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Hello,
we have an application using a CYT4BB µC. I'm trying to toggle an SPI driver IC with a simple 50% duty cycle signal.
I've found the following example code in AN220224:
I changed the CNT value to 36, since I'm measuring the signal on pin 12.0. Is there any configuration parameter missing?
#include "Header/cy_project.h"
#define TCPWMx_GRPx_CNTx_PWM TCPWM0_GRP0_CNT36
#define PCLK_TCPWMx_CLOCKSx_PWM PCLK_TCPWM0_CLOCKS36
#define TCPWM_PERI_CLK_DIVIDER_NO_PWM 0ul
#define TCPWMx_PWM_PRESCALAR_DIV_x CY_TCPWM_PWM_PRESCALER_DIVBY_128 // 2,000,000 / 128 = 15,625Hz
#define TCPWMx_PERIOD 0x1000ul // 15,625Hz / 4096 (0x1000) = 3.815Hz (PWM frequency)
#define TCPWMx_COMPARE0 0x800ul // 0x800 / 0x1000 = 0.5 (PWM duty)
/* Provided config struct */
cy_stc_tcpwm_pwm_config_t const MyPWM_config =
{
.pwmMode = CY_TCPWM_PWM_MODE_PWM,
.clockPrescaler = TCPWMx_PWM_PRESCALAR_DIV_x,
.debug_pause = false,
.Cc0MatchMode = CY_TCPWM_PWM_TR_CTRL2_CLEAR,
.OverflowMode = CY_TCPWM_PWM_TR_CTRL2_SET,
.UnderflowMode = CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE,
.Cc1MatchMode = CY_TCPWM_PWM_TR_CTRL2_NO_CHANGE,
.deadTime = 0ul,
.deadTimeComp = 0ul,
.runMode = CY_TCPWM_PWM_CONTINUOUS,
.period = TCPWMx_PERIOD - 1ul,
.period_buff = 0ul,
.enablePeriodSwap = false,
.compare0 = TCPWMx_COMPARE0,
.compare1 = 0ul,
.enableCompare0Swap = false,
.enableCompare1Swap = false,
.interruptSources = 0ul,
.invertPWMOut = 0ul,
.invertPWMOutN = 0ul,
.killMode = CY_TCPWM_PWM_STOP_ON_KILL,
.switchInputMode = 3ul,
.switchInput = 0ul,
.reloadInputMode = 3ul,
.reloadInput = 0ul,
.startInputMode = 3ul,
.startInput = 0ul,
.kill0InputMode = 3ul,
.kill0Input = 0ul,
.kill1InputMode = 3ul,
.kill1Input = 0ul,
.countInputMode = 3ul,
.countInput = 1ul,
};
int main(void)
{
uint32_t sourceFreq = 80000000ul;
uint32_t targetFreq = 2000000ul;
uint32_t divNum = (sourceFreq / targetFreq);
/* Assign a programmable divider for TCPWM0_GRPx_CNTx_COUNTER */
Cy_SysClk_PeriphAssignDivider(PCLK_TCPWMx_CLOCKSx_PWM, CY_SYSCLK_DIV_16_BIT, TCPWM_PERI_CLK_DIVIDER_NO_PWM);
/* Sets the 16-bit divider */
Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, TCPWM_PERI_CLK_DIVIDER_NO_PWM, 0u, (divNum-1ul));
/* Enable the divider */
Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, TCPWM_PERI_CLK_DIVIDER_NO_PWM, 0u);
/* Initialize TCPWM0_GRPx_CNTx_PWM_PR as PWM Mode & Enable */
Cy_Tcpwm_Pwm_Init(TCPWMx_GRPx_CNTx_PWM, &MyPWM_config);
Cy_Tcpwm_Pwm_Enable(TCPWMx_GRPx_CNTx_PWM);
Cy_Tcpwm_TriggerStart(TCPWMx_GRPx_CNTx_PWM);
for(;;);
}
Solved! Go to Solution.
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Hi lukasw,
yes, I agree, in CYT4BB there is only TCPWM0. Do you use the compiler from IAR and the standard driver library SDL from Infineon?
P12_0_TCPWM0_LINE36 is defined in the gpio-header file in the SDL:
The value is 8 and 8 selects ACT#0 from the high speed IO matrix, which is connected to PWM0_36 according to Table 13-1 in the datasheet.
Instead of P12_0_TCPWM0_LINE36 you could also use the name HSIOM_SEL_ACT_0 (which is also 8 but then the code becomes less readable.
But you have to configure the port pin, otherwise you will not have a signal output from the timer on a pin!
Regards
JJack
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Hi lukasw,
when you change the TCPWM counter you have to change the clock source as well:
#define PCLK_TCPWMx_CLOCKSx_PWM PCLK_TCPWM0_CLOCKS36
Regards
JJack
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Hey JJack thank you I've fixed that.
However, I still don't measure an output on pin 12. My debugger shows that CNT36 is configured and enabled, and I'm idling in the for loop.
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Hi lukasw,
you have to configure Port 12.0 so that you can measure the signal output of the PWM on Port 12.0:
/* TCPWM_LINE */
#define TCPWMx_LINEx_PORT GPIO_PRT12
#define TCPWMx_LINEx_PIN 0ul
#define TCPWMx_LINEx_MUX P12_0_TCPWM0_LINE36
cy_stc_gpio_pin_config_t pin_cfg1 =
{
.outVal = 0ul,
.driveMode = CY_GPIO_DM_STRONG_IN_OFF,
.hsiom = TCPWMx_LINEx_MUX,
.intEdge = 0ul,
.intMask = 0ul,
.vtrip = 0ul,
.slewRate = 0ul,
.driveSel = 0ul,
};
/*------------------------------*/
/* Port Configuration for TCPWM */
/*------------------------------*/
Cy_GPIO_Pin_Init(TCPWMx_LINEx_PORT, TCPWMx_LINEx_PIN, &pin_cfg1);
Regards
JJack
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I can only find line 36 when using TCPWM1 module
P12_0_TCPWM1_LINE36 = 8,
:
P12_0_TCPWM0_LINE513 = 22,
However, there is no TCPWM1_GRP0_CNT36 and PCLK_TCPWM1_CLOCKS36 macro, only for TCPWM0.
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Hi lukasw,
yes, I agree, in CYT4BB there is only TCPWM0. Do you use the compiler from IAR and the standard driver library SDL from Infineon?
P12_0_TCPWM0_LINE36 is defined in the gpio-header file in the SDL:
The value is 8 and 8 selects ACT#0 from the high speed IO matrix, which is connected to PWM0_36 according to Table 13-1 in the datasheet.
Instead of P12_0_TCPWM0_LINE36 you could also use the name HSIOM_SEL_ACT_0 (which is also 8 but then the code becomes less readable.
But you have to configure the port pin, otherwise you will not have a signal output from the timer on a pin!
Regards
JJack
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Thank you very much. The problem was that the wrong GPIO file was included in the project. We are not using IAR, GHS, … rather, build using VS Code and command line.
Line number, group and count have the following relationship:
LINEx: x = (256 * GrpNum) + (CntNum)
I'm now using the following configuration and everything works.
/* PWM Mode Configuration def */
#define TCPWMx_GRPx_CNTx_PWM TCPWM0_GRP0_CNT36
#define PCLK_TCPWMx_CLOCKSx_PWM PCLK_TCPWM0_CLOCKS36
#define TCPWM_PERI_CLK_DIVIDER_NO_PWM 0u
#define TCPWMx_PWM_PRESCALAR_DIV_x CY_TCPWM_PWM_PRESCALER_DIVBY_128 // 2,000,000 / 128 = 15,625Hz
#define TCPWMx_PERIOD 0x1000 // 15,625Hz / 4096 (0x1000) = 3.815Hz (PWM frequency)
#define TCPWMx_COMPARE0 0x800 // 0x800 / 0x1000 = 0.5 (PWM duty)
// LINEx: x = (256 * GrpNum) + (CntNum)
/* TCPWM_LINE0 */
#define TCPWMx_LINEx_PORT GPIO_PRT12
#define TCPWMx_LINEx_PIN 0u
#define TCPWMx_LINEx_MUX P12_0_TCPWM0_LINE36