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TRAVEO™ T2G Forum Discussions

apeter
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Hello everyone,

Currently we encounter a problem when we try to flash code with the SROM API call for ProgramRow.

It returns 0xf0000013 which is stated as "Invalid arguments location" in the TRM.

Could someone please explain this to me further?

 

Thank you and best regards,
apeter 

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Kavya
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Hello Andreas,

Thanks for the details on the part number which you are using.

One observation based on the details you provided regarding parameters passed to ProgramRow SROM API: You have mentioned that 'addressofSRAMwheredatatobepgrogrammedisstored' is 0x28001236. This address is not  32-bit aligned. TRM states that this address should be provided in 32-bit system address format.

Could you please change the address of SRAM where data to be programmed is stored to be a 32-bit aligned address and test again? Please let us know if the issue still persists.

Thanks,

Kavya

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Kavya
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100 sign-ins 10 likes received 50 replies posted

Hello,

While you invoke ProgramRow SROM API, IPC_DATA0 register should have a valid SRAM address where the parameters to be sent to the API are stored. This SRAM address ('SRAM_SCRATCH_ADDR' - as specified in the Architecture TRM) will contain the opcode corresponding to ProgramRow SROM API (0x06) and the other parameters, data to be loaded and the flash address to be programmed as explained in the TRM.

So, as a first step please verify through the debugger that if a valid SRAM address is loaded in IPC_DATA0 register while invoking this SROM API and if the parameters to be passed to the SROM API are present in that SRAM address in the same format as specified in the TRM.

Thanks,

Kavya

 

apeter
Level 2
Level 2
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Hello @Kavya ,

I have debugged the code now and following are my findings:

IPC_DATA0 SRAM address is 0x2800105c and is valid in the range of 0x20000000 - 0x3FFFFFFF

The parameters passed are also correct.

Please find them below:

opcode = 0x06
skipblankcheck = 0x01
blockingmode = 0x01

interruptmask = 0x00
datasizeforcodeflash = 0x09

flashaddresstobeprogrammed = 0x103E8000
addressofSRAMwheredatatobepgrogrammedisstored = 0x28001236

datatobeprogrammedinflash = 0x3B32D502

Further information:

When I execute the erase sector SROM API before the Program Row SROM API it will return CY_SROM_RESPONSE_SUCCESS on the same IPC_DATA0 register 0x2800105c

However the Program Row SROM API call returns CY_SROM_RESPONSE_FAIL with IPC_DATA0 register 0x2800105c

Is there something else that can interfere with the Program Row call and therefore it won't execute?

Thank you very much for your help and best regards,
apeter

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Kavya
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100 sign-ins 10 likes received 50 replies posted

Hello @apeter ,

I would like to confirm on the device family/part number which you are using. I see 'CYT4BB8CEE' mentioned as a tag for this thread. Could you please confirm if this is the part number of the device which you are using?

If not, please provide the details.

Thanks,

Kavya

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apeter
Level 2
Level 2
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Hello @Kavya ,

Actually we are using the 'CYT4BB5CEBES'

Sorry for taging the wrong one will edit it to the correct one.

Thank you and best regards,
Andreas

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Kavya
Moderator
Moderator
Moderator
100 sign-ins 10 likes received 50 replies posted

Hello Andreas,

Thanks for the details on the part number which you are using.

One observation based on the details you provided regarding parameters passed to ProgramRow SROM API: You have mentioned that 'addressofSRAMwheredatatobepgrogrammedisstored' is 0x28001236. This address is not  32-bit aligned. TRM states that this address should be provided in 32-bit system address format.

Could you please change the address of SRAM where data to be programmed is stored to be a 32-bit aligned address and test again? Please let us know if the issue still persists.

Thanks,

Kavya

apeter
Level 2
Level 2
25 sign-ins 5 likes given 10 sign-ins

Hello Kavya,

Thank you very much for your help it worked by changing it to a 32-bit aligned address.
Maybe I had an older TRM where it doesn't states that this address should also be provided in 32-bit system address format in SRAM_SCRATCH_DATA_ADDR

Here's a picture of my TRM Revision *F from October 06, 2021:

Screenshot (311).png

Thank you and best regards,
Andreas

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Kavya
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100 sign-ins 10 likes received 50 replies posted

Hello Andreas,

Understood. You can download the latest version of TRM from our website or you can also access the documents through myICP platform if you have registered for it.

Thanks,

Kavya