Question about Traveo II MCU programming spec

JackHsu_1153471 · ‎Sep 29, 2021

Hi,

I'm refer to the programming spec(002-22035 Rev. *B) of Traveo II to develop the programming algo.

Regarding to the CallSromApi subroutine, there is the description.

// Enable the notification interrupt of IPC_INTR_STRUCT[0](CM0+) for IPC_STRUCT[IpcId]
WriteIO IPC_INTR_STRUCT + IPC_INTR_STRUCT_INTR_IPC_MASK_OFFSET, 1 << (16 + 2));

May I know what definition is for IPC_INTR_STRUCT_INTR_IPC_MASK_OFFSET?

I'm not it is typo or not. Thank you.

Ashish · ‎Oct 04, 2021

Hi ,

The definition of IPC_INTR_STRUCT_INTR_IPC_MASK_OFFSET appears to be missing in programming spec document, but the comment above the line mentions "Enable the notification interrupt of IPC_INTR_STRUCT[0](CM0+) for IPC_STRUCT[IpcId]" . So, you can refer the Register TRM of the target device , under IPC_INTR_STRUCT0_INTR_MASK (refer snapshot from TVII-BE-2M Register TRM below) . Since the parameter being passed is IPC_INTR_STRUCT + IPC_INTR_STRUCT_INTR_IPC_MASK_OFFSET, so you can subtract the IPC_INTR_STRUCT value (0x40221000) to get the offset value (which should be 0x08 here).

Best Regards,

Ashish

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Question about Traveo II MCU programming spec

Question about Traveo II MCU programming spec

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