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TRAVEO™ T2G Forum Discussions

Sirsikar
Level 1
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Level 1

Hello, I am working on flash driver on M4 which tries to erase an unused application Flash area using M0 Plus.For this IPC being used.In M0Plus interrupts 0 and 1 are enabled and interrupt routines are directed to internal SROM interrupt routines.The IPC communication is implemented as per the defined notify and release mechanism.currently the blank check of workflash is working without any problem.However when a flash erase is done, M0Plus is able to erase it but then immediately ending up in Hardfault and it is happening in the internal SROM interrupt routine.There is no overlap between the Code flash on which M4 ,M0+ code are  running and flash area being erased.moreover, the flash driver is running on on Ram.Note- M4 has no interrupt enabled. But it is getting the correct release event for the blankcheck and the 1st block of code flash erased before it also goes to forced hardfault.Thanks

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Sirsikar
Level 1
First solution authored First reply posted First question asked
Level 1

Hi Guys, I have been able to fix it myself. Even though the minimilistic infinite for loop in the M0Plus code does nothing at all except waiting to serve the incoming  interrupts coming from M4, It causes problem if it is running from flash.Just executing this couple of bytes of code from Ram solved the issue.It might help someone,so posting🙂

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Sirsikar
Level 1
First solution authored First reply posted First question asked
Level 1

Hi Guys, I have been able to fix it myself. Even though the minimilistic infinite for loop in the M0Plus code does nothing at all except waiting to serve the incoming  interrupts coming from M4, It causes problem if it is running from flash.Just executing this couple of bytes of code from Ram solved the issue.It might help someone,so posting🙂

0 Likes