Hi Cypress Expert,
I've test with "Wakeup_From_GPIO_Interrupt" and tried my best to optimize the power consumption. It is about 70uA. Do you have any tested demo code which power consumption is around 35uA?PN is CYT2B98CACES.
Thanks
Sophie
Solved! Go to Solution.
Hi Sophie,
I think the example from the SDL is to show how to transit from active mode to deepsleep and waking up again. It is not useful to achieve the lowest current consumption in deepsleep. Here are my points why:
Hello Sophie,
May I ask you which board you used to measure deep sleep current? Did you use our EVK or a custom board?
Thanks,
Kavya
Hello Sophie,
Please be informed that Traveo II EVK is not designed for Deep sleep current measurement, if in case you are using it for this purpose. So, it is not ensured that you will be seeing the optimized deep sleep current values measured on EVKs.
Thanks,
Kavya
Hi Kavya,
Does Infineon AE team anyone who had test the CYT2B98 can really work with 35uA @Deepsleep mode?
Thanks
Sophie
Hi Sophie,
I think the example from the SDL is to show how to transit from active mode to deepsleep and waking up again. It is not useful to achieve the lowest current consumption in deepsleep. Here are my points why:
Hello Sophie,
There is no example available currently to guarantee a deepsleep current of around 35uA. You may have to test on a custom board designed for deepsleep current measurement to know the actual deesleep current consumed by the Traveo II chip. Along with that, please try to follow the approach suggested on this thread to reduce the current consumption by the unused pins when in deepsleep mode. You may also consider not retaining the SRAM regions (except the initial 2KB which is mandatory to retain) if it is not needed to be retained in deepsleep to reduce the current consumption.
Thanks,
Kavya