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rloader
Level 2
Level 2
10 sign-ins 5 questions asked 5 sign-ins

Hi,

We recently upgraded our firmware for a CYT4BB (rev b) to use SDL 7.8.0 (previously SDL 7.2.0). We noted that after this that the Vccd supply rail on our boards has increased. It is now outside of the datasheet bounds (SID600) and therefore flagged as a hardware failure by our manufacturing team.

I'm writing to ask about the power supply configuration code (cy_power.c) in the SDL, and what the expected Vccd range really is.

Our board is powering the Vccd core voltage with an external pass transistor, following the examples in the Cypress documentation. From our SystemInit function we call " Cy_Power_SwitchToTransistor(CY_SYSREGHC_VADJ_1V070);"

With SDL 7.2.0, this resulted in a Vccd very close to 1.07V and within the relevant datasheet bounds.

Since change to SDL 7.8.0, on the same board, the Vccd now measures 1.156V which is outside of the datasheet SID600 bound (max 1.150V).

Inspecting the SDL 7.8.0 code in cy_power.c, we see that the supplied parameter is overridden, and VoltageAdjust = CY_SYSREGHC_VADJ_1V150 is applied instead, explaining the difference between SDL 7.2.0 and SDL 7.8.0.

So two questions:

* Is the SDL 7.8.0 behaviour expected, should we using a 1.150V set-point for the regulator or should we be using some other value.

* What are acceptable values for the Vccd rail in practice (measured at the CPU pins), to (1) be in an acceptable range for CPU operation, and (2) to verify that the regulator circuitry is functioning correctly?

(On the latter, it appears likely that the datasheet SID600 was written anticipating that the firmware would configure the regulator at 1.10V or 1.07V, and the SID600 number should be adjusted if running at a 1.15V set-point?)

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1 Solution
Reza_A
Moderator
Moderator
Moderator
25 solutions authored 10 likes given 50 replies posted

Hi @rloader,

 

Yes, the behavior is expected, it is mentioned here in the SDL release note Change Log from v7.2.0 to v7.3.0 that indeed the value of "VoltageAdjust" has been updated. Kindly also check below snippet taken from the T2G Body High Architecture TRM, which explains the steps of transitions from Active Regulator to Pass Transistor. There, it is mentioned that the REGHC_VADJ register needs to be added with the signed offset in the SFLASH_SRSS_PWR_OFFSET.REGHC_TRANS_VADJ_OFFSET to account for die to die variation. This explains the ifelse statement in the SwitchToExternal function for configuring the VoltageAdjust.

Randriad_1-1698168859992.png

 

SID600 refers to the regulator specifications, describing the min-typical-max values of the regulator output. For External VCCD power supply range, please refer to SID40C.

 

I hope this helps.

Thank you.

 

Best regards.

 

 

 

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2 Replies
Reza_A
Moderator
Moderator
Moderator
25 solutions authored 10 likes given 50 replies posted

Hi @rloader,

We are checking your queries. I will update this community forum promptly.
Thank you.

Best regards.

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Reza_A
Moderator
Moderator
Moderator
25 solutions authored 10 likes given 50 replies posted

Hi @rloader,

 

Yes, the behavior is expected, it is mentioned here in the SDL release note Change Log from v7.2.0 to v7.3.0 that indeed the value of "VoltageAdjust" has been updated. Kindly also check below snippet taken from the T2G Body High Architecture TRM, which explains the steps of transitions from Active Regulator to Pass Transistor. There, it is mentioned that the REGHC_VADJ register needs to be added with the signed offset in the SFLASH_SRSS_PWR_OFFSET.REGHC_TRANS_VADJ_OFFSET to account for die to die variation. This explains the ifelse statement in the SwitchToExternal function for configuring the VoltageAdjust.

Randriad_1-1698168859992.png

 

SID600 refers to the regulator specifications, describing the min-typical-max values of the regulator output. For External VCCD power supply range, please refer to SID40C.

 

I hope this helps.

Thank you.

 

Best regards.

 

 

 

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