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How can the application distinguish CM7_0 and CM7_1 cores during runtime? Is there some core register that keeps the CPU index information (readable by application)? I have found only the CPUID register with identification of the CM0+ and CM7 but without index information.
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Automotive Traveo_II
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Hi,
The expected values for the 'MS' field is given in the 'Table 22-1. Bus Masters for Access and Protection Control' of the device datasheet.
'PC' refers to the Protection Context of the current Bus master. It is used to restrict access to memory and peripheral resources. The value depends on how Memory Protection Unit is configured for that particular core. It ranges from 0 to 7. For more information on PC refer to the 'Protection Context' section of the device Architecture TRM.