CYT4BFBCHD can not be connected via JTAG and SWD

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yanzhuang
Level 1
Level 1
First solution authored 5 replies posted First reply posted

I have several problem boards which mcu type is CYT4BFBCHD ,now i can not connect via JTAG and SWD.

Connections are confirmed.

JTAG failed dialog box:

yanzhuang_0-1661328235054.jpeg

SWD failed dialog box:

yanzhuang_1-1661328325515.jpeg

 

yanzhuang_2-1661328338563.jpeg

How this problem comes:

case1: download image with a wrong start address ;

case2: connect via Jflash successfully with Jlink, and download start with  error dialog box says Failed to download RAMCode and never connect succefully again.

yanzhuang_3-1661328873905.jpeg

 

I tried use Autoflash Utility to erase flash, good board can erase successfully but problem boards failed.

Command and log as following:

Work normally boards: successfully

C:\Program Files (x86)\Cypress\Cypress Auto Flash Utility 1.0\bin>openocd -s ../scripts -f interface/jlink.cfg -c "transport select swd" -f target/traveo2_8m.cfg -c "init; reset init; flash erase_address 0x10000000 0x8000; shutdown"

Open On-Chip Debugger 0.10.0+dev-1.0.0.277 (2019-10-11-11:05)

Licensed under GNU GPL v2

For bug reports, read

        http://openocd.org/doc/doxygen/bugs.html

swd

adapter speed: 1000 kHz

** Test Mode acquire not supported by selected adapter

cortex_m reset_config sysresetreq

adapter_nsrst_delay: 100

adapter_nsrst_delay: 100

enable_hyperram

Info : J-Link V9 compiled May  7 2021 16:26:12

Info : Hardware version: 9.20

Info : VTarget = 2.797 V

Info : clock speed 1000 kHz

Info : SWD DPIDR 0x6ba02477

Info : traveo2_8m.cpu.cm0: hardware has 4 breakpoints, 2 watchpoints

Info : traveo2_8m.cpu.cm0: external reset detected

***************************************

** Use overriden Main Flash size, kb: 8384

** Use overriden Work Flash size, kb: 256

** Silicon: 0xE5EB, Family: 0x103, Rev.: 0x23 (B2)

** Detected Device: CYT4BFBCJE

** Flash Boot version 3.1.0.512

** Chip Protection: NORMAL

***************************************

Info : traveo2_8m.cpu.cm70: hardware has 8 breakpoints, 4 watchpoints

Info : traveo2_8m.cpu.cm71: hardware has 8 breakpoints, 4 watchpoints

Info : traveo2_8m.cpu.cm70: external reset detected

Info : traveo2_8m.cpu.cm71: external reset detected

Info : Listening on port 3333 for gdb connections

Info : Listening on port 3334 for gdb connections

Info : Listening on port 3335 for gdb connections

** traveo2_8m.cpu.cm0: Ran after reset and before halt...

target halted due to debug-request, current mode: Thread

xPSR: 0x21000000 pc: 0x170042a6 msp: 0x280ff7e8

Info : Vector Table address invalid (0xFFFF0000), reset_halt skipped

** traveo2_8m.cpu.cm70: Ran after reset and before halt...

target halted due to debug-request, current mode: Thread

xPSR: 0x61000000 pc: 0x000001e8 msp: 0x280ff800

** traveo2_8m.cpu.cm71: Ran after reset and before halt...

target halted due to debug-request, current mode: Thread

xPSR: 0x61000000 pc: 0x00000118 msp: 0x280ff800

[100%] [################################] [ Erasing     ]

erased address 0x10000000 (length 32768) in 0.078137s (409.537 KiB/s)

shutdown command invoked

2pcs problem boards failed log:

C:\Program Files (x86)\Cypress\Cypress Auto Flash Utility 1.0\bin>openocd -s ../scripts -f interface/jlink.cfg -c "transport select swd" -f target/traveo2_8m.cfg -c "init; reset init; flash erase_address 0x10000000 0x8000; shutdown"

Open On-Chip Debugger 0.10.0+dev-1.0.0.277 (2019-10-11-11:05)

Licensed under GNU GPL v2

For bug reports, read

        http://openocd.org/doc/doxygen/bugs.html

swd

adapter speed: 1000 kHz

** Test Mode acquire not supported by selected adapter

cortex_m reset_config sysresetreq

adapter_nsrst_delay: 100

adapter_nsrst_delay: 100

enable_hyperram

Info : J-Link V9 compiled May  7 2021 16:26:12

Info : Hardware version: 9.20

Info : VTarget = 2.916 V

Info : clock speed 1000 kHz

Error: DAP 'traveo2_8m.cpu' initialization failed (check connection, power, etc.)

 

Please help on this, is mcu jtag or swd interface disabled ? or mcu locked?

Can i recover the mcu or using other interface to erase or recover, such as UART interface?

Thanks a lot.

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3 Replies
Apurva_S
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi @yanzhuang 

Are you using one of the evaluation boards for Traveo T2G or any custom board?

Regards.

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Hi @Apurva_S 

Can you sent email to me?       yzhuang@aceinna.com

I can not reply this topic,  error will occur.

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yanzhuang
Level 1
Level 1
First solution authored 5 replies posted First reply posted

Hi @Apurva_S 

We are using our own designed boards which mcu is CYT4BFBCHD, and  the project is close to mass production.

Do you have any idea of recovering these MCUs ? 

Thanks for your quick reply.

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