CYT2B7 Bootloader design consultation

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Translation_Bot
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Currently, the project is developing the CYT2B7 bootloader function. Please help answer some questions:

  1. CM0+ is a bootloader project to upgrade the CM4 application. When the program switches to CM4, do peripherals such as CAN and timers used by CM0+ need to be reinitialized?
  2. After the CM4 program is running, does the working state of CM0+ continue to execute or stop working? How is the program configured for management?
  3. CM4 If I need to call the CRYPTO module, can I directly call the interface in the Drivers library without worrying about interaction with CM0+?
  4. Does CM0+ in the project start the CM4 program through cy_sysenableapplcore (CY_CORTEX_M4_APP_ADDR)? If I need to jump from cm4 to cm0+ to perform the bootloader upgrade operation, what function should I call?
  5. When CM0+ jumps to CM4 and CM4 jumps to CM0+ , does implementation require control of the interrupt vector table? What are the redirection considerations and function execution procedures?
  6. If using dual bank mode, do the CM0+ and CM4 programs run at the same time, and how can interruptions (CAN, timers, etc.) prevent mutual interference?

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/CYT2B7-Bootloader%E8%AE%BE%E8%AE%A1%E5%92%A8%E8%AF%A2/td-p/657723

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Translation_Bot
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Hi Yumin,

CM0+ and CM4 have dual cores running independently. There is no saying that CM0 jumps to CM4 and CM4 jumps to CM0. There is also an independent interruption vector table. For details, you can read the training information:
Dual bank also has nothing to do with dual-core operation. It is used for OTA, which means that the memory space is divided into two banks. You can check out his AN information:
Crypto information:
CM4 can call related functions. Examples are in SDL:
T2G_Sample_Driver_Library_7.9.0\ tviibe1m\ src\ examples\ crypto
I also sent an example of Single Bank Bootloader to WeiKeng Jerry via the MSD case system earlier, so you can ask about it.
Best Housekeeping,
Janine

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/CYT2B7-Bootloader%E8%AE%BE%E8%AE%A1%E5%92%A8%E8%AF%A2/m-p/657795

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Translation_Bot
Community Manager
Community Manager
Community Manager

Hi Yumin,

CM0+ and CM4 have dual cores running independently. There is no saying that CM0 jumps to CM4 and CM4 jumps to CM0. There is also an independent interruption vector table. For details, you can read the training information:
Dual bank also has nothing to do with dual-core operation. It is used for OTA, which means that the memory space is divided into two banks. You can check out his AN information:
Crypto information:
CM4 can call related functions. Examples are in SDL:
T2G_Sample_Driver_Library_7.9.0\ tviibe1m\ src\ examples\ crypto
I also sent an example of Single Bank Bootloader to WeiKeng Jerry via the MSD case system earlier, so you can ask about it.
Best Housekeeping,
Janine

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/CYT2B7-Bootloader%E8%AE%BE%E8%AE%A1%E5%92%A8%E8%AF%A2/m-p/657795

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