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ZhouFeng
Level 1
Level 1
First question asked Welcome!

I used Microcontroller CYT2B7 80-LQFP

1st, I use only SAR2 ADC group, ADC channel from 0 to 7 were used channel 7 is the last channel .

2nd, I get ADC convert result by copy PASS0_SAR2_CHx_RESULT register value not by interrupt and DMA.

3rd, I get ADC convert result timing is check register PASS_SAR_CH7_INTR_MASK bit0 GRP_DONE_MASK [0:0] set to 0x1.

My question is if we only check register PASS_SAR_CH7_INTR_MASK bit0 GRP_DONE_MASK [0:0] set to 0x1, Can I consider no ADC group and Channel overflow happened and don't need both check  GRP_OVERFLOW_MASK[2:2] and CH_OVERFLOW_MASK[10:10]. Is the GRP_DONE_MASK and GRP_OVERFLOW_MASK are mutual exclusion.

 

Thank you to the answer.

Best regards

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abhikul
Moderator
Moderator
Moderator
50 sign-ins 10 solutions authored 25 replies posted

Hello @ZhouFeng 

Could you please elaborate all your three statements mentioned in your query more clearly?

Also please state what exactly your query is all about.

Thanks & Regards

Abhishek Kulkarni  

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