- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Solved! Go to Solution.
- Labels:
-
FM4_MCU
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Balwant,
The CTI (cross trigger interface) and FP (floating point unit) are part of CPU core (CM0+ and CM4) specified by Arm, so kindly check in the ARM documentation on CM0+ and CM4 for core specific registers and interrupts to get more details. You can find some information on this in TVII- Register TRM in SYSTEM->CM0P and SYSTEM->CM4 . For Crypto- the registers related to this block are not exposed in register TRM , it's expected to access through HSM performance library. However, if they are mentioned in SDL header file as you said, then you can use that for your reference.
Thanks,
Ashish
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Balwant,
The CTI (cross trigger interface) and FP (floating point unit) are part of CPU core (CM0+ and CM4) specified by Arm, so kindly check in the ARM documentation on CM0+ and CM4 for core specific registers and interrupts to get more details. You can find some information on this in TVII- Register TRM in SYSTEM->CM0P and SYSTEM->CM4 . For Crypto- the registers related to this block are not exposed in register TRM , it's expected to access through HSM performance library. However, if they are mentioned in SDL header file as you said, then you can use that for your reference.
Thanks,
Ashish