Our application audio DAC need Master clock(MCLK) input. Like 2.8224Mhz/5.6448Mhz/11.2896Mhz(fs:44.1Khz) or 3.072Mhz/6.144Mhz/12.288Mhz(fs:48Khz)
And it request must be synchronized with I2S SCK / WS.
But currently we use CYW20706 only support below signal for audio DAC.
■ I 2S Clock: I2S SCK
■ I 2S Word Select: I2S WS
■ I 2S Data Out: I2S DO
Have anyone can provide suggestion or parts for our application?
Solved! Go to Solution.