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Studio Bluetooth

MaMi_1707981
Contributor II

Could you let me know the behavior in I2S slave mode ?

  1. Can 343026 handle higher sampling rate then 48 kHz ?
  2. Can 343026 handle longer sampling data then 16 bits ?

According to the data sheet, 343026 is supported up to a maximum of 3.072 MHz.

48 kHz * 16 bits * 2 channels = 1.536 Mbps.

So, it looks 343026 may use higher or longer data then 48 kHz, 16 bits.

For examples, is 343026 able support the following settings ?

    Case 1) 96 kHz, 16 bits, 2 channels

    Case 2) 48 kHz, 24 bits, 2 channels

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1 Solution
SheetalJ
Moderator
Moderator

24 bit configuration is not supported by Cypress devices, therefore case 2 will not work for CYBT343026 module.

You can use configuration given in case 1.

View solution in original post

6 Replies
SheetalJ
Moderator
Moderator

Hello MaMi_3520196​,

Please refer PCM/I2S Clock setting in CYW20706 and WICED Studio Bluetooth Forums.

Let us know if this clarifies your doubt.

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MaMi_1707981
Contributor II

Hi SheetalJ_96,

I had already read them.

But there is less information about I2S slave in them.

So could you let me know the details when I2S slave mode ?

> For examples, is 343026 able support the following settings ?

>    Case 1) 96 kHz, 16 bits, 2 channels

>    Case 2) 48 kHz, 24 bits, 2 channels

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SheetalJ
Moderator
Moderator

24 bit configuration is not supported by Cypress devices, therefore case 2 will not work for CYBT343026 module.

You can use configuration given in case 1.

View solution in original post

MaMi_1707981
Contributor II

Thank you for rapidly supporting.

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YoJa_3107936
Contributor II

Hi SheetalJ_96

Excuse me for cutting in.

MaMi is my partner.

I confirmed the DataSheet (P38) of 20706, and added below question.

>The clock rate in master mode is either of the following:

>■ 48 kHz x 32 bits per frame = 1.536 MHz

>■ 48 kHz x 50 bits per frame = 2.400 MHz

Customer focuses on [48 kHz x 50 bits per frame = 2.400 MHz].

This is possible(48kHz_24bit) because it is less than 50 bits.

> 24 bit configuration is not supported by Cypress devices,

> therefore case 2 will not work for CYBT343026 module.

Could you tell how many bit patterns are possible?

And why do you write 50 bits?

Thanks

Yang

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SheetalJ
Moderator
Moderator

Hi Yang,

For I2S master, 48 kHz x 50 bits per frame = 2.400 MHz configuration is not supported. I will initiate the process to make the update in datasheet. Apologies for the confusion caused.!

Please refer PCM/I2S Clock setting in CYW20706 for updated I2S master-slave configurations.