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Specialty Memory Forum Discussions

Anonymous
Not applicable

The CY7C0833V data sheet (Doc# 38-06059 Rev. AA, 8/1/2017) notes in fig 1 that the CE and CE/ pins are not applicable for this part and must be tied off to VSS and VDD, respectively [to always enable them].

No such notes are listed in Table 3. Is this device truly intended to be on a bus by itself as it cannot be deselected?

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nileshbadodekar
Employee
Employee
5 sign-ins 10 replies posted 5 replies posted

Hi

Yes that is the correct interpretation for CY7C0833V device. To add on to it, You can however share the bus with other devices since OE# signals can be used to put the get control of the bus.

In the Pin definition on Page 6, we try to capture the functionality/

Please have a look at Note 28.

*ISB1, ISB2, ISB3 and ISB4 are not applicable for CY7C0833V because it can not be powered down by using chip enable pins.

Regards,

Nilesh

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nileshbadodekar
Employee
Employee
5 sign-ins 10 replies posted 5 replies posted

Hi

Yes that is the correct interpretation for CY7C0833V device. To add on to it, You can however share the bus with other devices since OE# signals can be used to put the get control of the bus.

In the Pin definition on Page 6, we try to capture the functionality/

Please have a look at Note 28.

*ISB1, ISB2, ISB3 and ISB4 are not applicable for CY7C0833V because it can not be powered down by using chip enable pins.

Regards,

Nilesh

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