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The ModusToolbox™ forum includes discussions regarding multi-platform development tools and a comprehensive suite of GitHub-hosted firmware libraries accompanied by thoroughly tested code example applications.
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Discussion forum regarding PSoC Creator & Designer Software topics.
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AURIX™ Development Studio
The AURIX™ Development Studio is a free of charge Integrated Development Environment (IDE) for the TriCore™-based AURIX™ microcontroller family. It is a comprehensive development environment, including Eclipse IDE, C-Compiler, Multi-core Debugger, Infineon low-level driver (iLLD), with no time and code-size limitations that enables editing, compiling, and debugging of application code. Combined with numerous code example projects, the IDE can be used to evaluate the powerful architecture of the AURIX™ microcontroller family. It supports Microsoft Windows 10 as a host operating system (OS).
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I have a CY3269N Lighting Starter Demonstration Kit and I want to see the program which is implemented on the chip and to modify it. Therefore I need to know where could I find the program, if I can change it for particular applications and to reprogram it again. In fact I want to change the LED Controller to be actioned with some switches.
Thank you in advance!
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My name is "Shaik", I am new to "Embedded Systems". I have confused with few components of "CY3210 MiniProg1 MiniEval1" so can you please clarify my doubts?
I have highlighted few components of "CY3210 MiniProg1 MiniEval1" with "red colored boxes" in the attached JPG file so can you describe me what actually they are? and what the purpose of those?
Thanks in advance.
Regards,
Shaik Show Less
QP-nano consists of a universal UML-compliant event processor (QEP-nano), a highly portable event-driven framework (QF-nano), and a tiny preemptive run-to-completion kernel (QK-nano) as well as a cooperative kernel.
The QP-nano framework can manage up to 8 concurrently executing hierarchical state machines and requires only 1-2KB of code (ROM) and just several bytes of RAM. This tiny footprint, especially in RAM, makes QP-nano ideal for PSoC applications. Please refer to the www.state-machine.com website for more information.
Complete QP-nano development kit for the Cypress PSoCEVAL1 evaluation kit is available for free download from www.state-machine.com/psoc.
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I downloaded image compiler from http://www.cypress.com/?rID=34517 .
I installed PSoC_Designer_5.0_Service_Pack_4.5 and PSOC_PROGRAMMER_3.05.0.45.
I'm using cy3215-dk. After build, I tried to connect the ICE and load the code. It shows " couldn't detect pod, make sure programmer not using ICE ". But my programmer not using ICE.
Can you tell me procedure to connect the ICE , load the code and execute it ?
Please check the attachments....
Thanks & Regards,
Gururaja
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Thank you,
Lambros Gavriilides
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PSoC Designer 5.0 SP5.0 does not call PSoC Programmer for programming. For programming, one small sweet window pop ups and indicates the status of programming. But to check detailed status while programming, PSoC Programmer can be used. Now PSoC Programmer 3.06 is available for download.
Cheers,
Brijesh Show Less
Pod only connect P17 to voltage meter, no other external component.
the code make me confuse. (PS. Designer 5.0)
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PRT0GS &= ~0x08; //disconnect from global bus
PRT0DM2 |= 0x08;
PRT0DM1 &= ~0X08; //DM[2:0]=100, Slow strong high, high-z low
PRT0DM0 &= ~0x08;
PRT0DR &= ~0x08;
PRT3GS &= ~0x02; //disconnect from global bus
PRT3DM2 |= 0x02;
PRT3DM1 &= ~0x02; //DM[2:0]=100, Slow strong high, high-z low
PRT3DM0 &= ~0x02;
PRT3DR |= 0x02;
-----------------------------------------------------------------------------------------------
P17 is modified to low normally,
then modify P31 ,
P17 become high.....
Can any one tell me why ? please.
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I forget the P17 and P31 both connect to analog bus....
Forget my stupidity. Show Less
Hello everybody! I need help on a project that uses 20 power switching FETs in a circulating form which turns ON two groups of five FETs each with one group opposite to each other, leaving the five FETs in between of each side OFF (perpendicular).
Each opposite group of five FETs would circulate CCW with adjustable frequency of up to 2KHz by using a pot.
Does anybody have a sample project like this? Also, which files on PSoC Designer needs to be done or updated when changes are made?
I'm planning to use the CY8C27543 TQFP Chip
Anything would help!!
Regards,
Armando
I am experiencing this error while trying to compile my main.c. After consulting the IDE Guide and user manual I have found very vague explanations of this error. I hope you can throw some light on this. I use PSoC designer 5.0 SP4 and CY82C29466-24PVXI
The error message is as follows:
Generating test2 project...
Starting MAKE...
creating project.mk
lib/adc.asm
process_begin: CreateProcess((null), cpsoc.exe --msgdisable=845: off --asmlist --errformat --chip=CY8C29466 --WARN=0 --OPT=asm,9 -C -q -I./lib -IC:/PROGRA~1/Cypress/Common/CY3E64~1/tools/include/CY8C29~1 -Olib/obj/adc.obj lib/adc.asm, ...) failed.
make (e=2): The system cannot find the file specified.
C:\PROGRA~1\Cypress\Common\CY3E64~1\tools\make: *** [lib/obj/adc.obj] Error 2
test2 - 1 error(s) 0 warning(s) 11:17:58 Show Less
I'm using Designer 5 sp4.5 (although the same applies to sp4a), I spread the workspace over 2 monitors and like to use 2 Vertical tab groups, one with the chip design, the other with the source code I'm working on, that way I can always see the 'hardware' while editing the software.
no matter how many times I save the workspace, when the project/workspace is reopened, it reverts to a single tab group (see attached file). Surely the workspace includes the set-up of tabbed windows, am I missing something?