Software Forum Discussions

Hi. With new board design we can connect to CYW43907 mcu with J-Link)

What options need configurate in make file for custom board?

What platform need specify in build target name? For example "User.MyProject-CYW943907AEVAL1F JTAG=jlink download run".

Thanks.

Hello,

i can not install IDE in my Computer successfully. The error can be seen in Foto.  Help!

regards

I would like to install a serial terminal plugin for use with ModusToolbox / Eclipse. Perhaps this one. How can I do this in ModusToolbox and if "I can" is it safe and/or recommended?

Hi. We have custom board with CYW43907 chip. Communication error had occurred when we tried connect to device with J-Link: "Error: Cortex-A/R (connect): Communication error when trying to read IDR of AP[0]."

Please help with this issue.

Hi  there,

I ordere two kits of CYBT-213043-MESH EZ-BT™ Module Mesh Evaluation Kit and as the site ntiond the purchase day it shoulf be released early april. Do you now the exact date of this release?

Thanks.

PD: I'm waiting this kits to build urgently a new product.

Hello,

today I tried a simple example to read a pin into status register and failed at build time.

*** ERROR L127: UNRESOLVED EXTERNAL SYMBOL

    SYMBOL:  Status_Read

    MODULE:  .\DP8051\DP8051_Keil_951\Debug\main.obj (MAIN)

*** ERROR L128: REFERENCE MADE TO UNRESOLVED EXTERNAL

    SYMBOL:  Status_Read

    MODULE:  .\DP8051\DP8051_Keil_951\Debug\main.obj (MAIN)

    ADDRESS: 100075DH

Program Size: data=14.0 xdata=96 const=40 code=1950

The command 'LX51.exe' failed with exit code '2'.

Well, the Fitter tells

ADD: mpr.M0037: information: Unused pieces of the design have been optimized out. See the Tech mapping section of the report file for details.

where the report file doesn't give any new/more informations to me. In deed, the generated Status.c contains

#if !defined(Status_sts_sts_reg__REMOVED) /* Check for removal by optimization */

...

uint8 Status_Read(void)

{

    return Status_Status;

}

...

where cyfitter.h holds:

/* Status */

#define Status_sts_sts_reg__REMOVED 1u

All this explains the problem faced me but doesn't solve it since is problem is related to code generation stage ...  A documentation search also doesn't brought more clearity.

So, where is a check mark and documentation about those optimization? Optmization on hardware level is a good thing (obvioulsy happened here) but the software is forgotten - how to fix it?

Thanks!

Hi,

I'm trying to configure one of the ACLK pins to provide a clock to an external device. I've tried adding the following lines but it does not appear to have any affect:

            wiced_hal_gpio_configure_pin(WICED_P36, GPIO_OUTPUT_ENABLE, 0);

            wiced_hal_aclk_enable(24000000, ACLK0, ACLK_FREQ_24_MHZ);

I could not find anything that explicitly tells the GPIO driver what function I want on the pin, how does it know I want ACLK0 on P36 (rather than P32).

Similar to this question but a different device: CYW20735 ACLK on pin

Thanks

Nigel