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Level 5
Level 5
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In our application we are trying to use a flash chip that has the requirement that the CS line be raised shortly after the last bit is clocked in via SPI.  We try to raise the line directly after the SPI write command returns, but this is not fast enough for the peripheral and some fraction of the time, the command is ignored.

Is there any way to minimize the time between the end of the SPI write and our GPIO call to raise the line, beyond just making it be on the next line of the C code? 

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Hello Lewis,

1.  We are running at 24MHz, so it's not possible to run our device faster than this speed.

2.  Most FLASH devices are usually not that picky when it comes to timing for CS and the last bit of data on the bus.

3.  You are only doing 2 function calls within a few microseconds - You do a RW and do a GPIO set output high and 10 instructions in between.

4.  Did you start off with spi_comm_master.c ?

5.  Final comment - Please look at the FLASH datasheet and make sure of the timing of the CS line - What FLASH are you using?