BCM20732S PIN information

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Anonymous
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I have some questions about PIN of BCM20732S.

[notes]
* BCM20732S module pin number is shown after "PIN#"
** BCM20732 chip pin number is shown after "pin#"

(1) PIN#42 and PIN#43 of 20732S can be used simultaneously?
Both pins are connects with pin#32 of BCM20732 I think.
For example, when I use pin#32 as PWM0(P26), what will happen on PIN#43?

Is there any purpose/usage dividing pin#32 to PIN#42 and PIN#43?

Should I connect these lines as single line on main PCB?

Please tell me how I can use them.

I'd like to have schematic about inside of the module.


PIN#44 and PIN#1, and PIN#33 and PIN#34 are also same.


(2) PIN#43 can work as GPIO P26?
MMP20732S-TRM102-R says PIN#43 XTALO32K works as P26 in page 14.
I think it's just a mistake. But please make sure it's wrong or not.


(3) PIN#37 can be used as PUART_RX?
MMP20732S-TRM102-R says PIN#37 P24 works as both TX and RX. Is this correct?
PIN#37 also can be used as SPI1_MOSI I think. Is my understand correct?


(4) PIN#39 has LED1 as an alternate function. What does LED1 mean?

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1 Solution

P12/P26 map to seperate physcial pins, but are Dual bonded internally, so only one of two is available.

The SIP definitely contains the SOC die, and we provide both datasheets here on the website, so this seems to cause alot of confusion for users.

I've attempted to explain the mapping between the SoC and the SIP here: BCM2073XS GPIO Basics

View solution in original post

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14 Replies
MichaelF_56
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Regarding Question #4, there are 3 PWM channels on module.  Each of these channels can sink up to 16mA, which is ideal for for controlling LEDs and Buzzers.

Physical pin 39 then provides access to one of two PWMs via logical pins (those used by the firmware) P13 and P28 as shown below.

pin39.png

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Anonymous
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LED1 means PIN#39 can handle LED with 16mA current, right?

How about question #1 to #3?

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Anonymous
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Hello dmiya,

I am working on #1 - #3 and will get back to you.

JT

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Anonymous
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Sorry for bothering you.

Is there any progress about this?

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MichaelF_56
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Regarding the second portion of question #1, we cannot disclose the internal schematic of the module.

We will however attempt to address your questions regarding the GPIO assignment for the pins in question.

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Anonymous
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Hello Dmiya,

Please clarify your Pin Muxing Questions - I am having difficulty understanding your use case.  I assume that you are trying to configure for PWM functions, correct?

See comments/questions below:

  1. Pins 42 and 43 are separate pins on the BCM20732S Module as noted below PWM0 is on Pin 42:Pin42.PNG
  2. I assume that you want are trying to use Pin 42 for PWM0, you can't use Logical pin 26 for anything else.  As shown below, pin 26 is used for the XTALO32K.  If you need to use this function from Pin 43, you will need to use Logical pin 12, NOT pin 26, if you wanted to use Logical pin 26 for PWM0 on Pin 42 as shown above.Pin43.PNG
  3. Let me confirm the usage/alternate function of pin 32 in this configuration.
  4. Regarding your (3) question, I will check on the MMP20732S-TRM102-R  PIN#37 P24 detail as to whether the function works as both TX and RX - Thank you for pointing that out.
  5. I will also check on the SPI1_MOSI function on PIN#37.

Pin37.PNG

Thank you

JT

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Anonymous
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Hello JT,

Thank you for your comment.

I understand that PIN#42 and #43 are separated on BCM20732S module.

But they are from same pin(#32) of BCM20732 chip. Please see 20732 SOC datasheet.

So I assume when I use PWM0 from PIN#42, same signal will appear on PIN#43.

Is my understanding correct?

Regarding GPIO P26, it's different item of above question.

Please check 20732 SOC datasheet. is says different thing from MMP20732S-TRM102-R.

Which is correct?

About my original question (3), let me know your feedback.

Thank you,

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"I understand that PIN#42 and #43 are separated on BCM20732S module.

But they are from same pin(#32) of BCM20732 chip. Please see 20732 SOC datasheet.

So I assume when I use PWM0 from PIN#42, same signal will appear on PIN#43.

Is my understanding correct?"

Correct. However, other signals can appear on physical pin 43 as well as the firmware handles the internal muxing of these signals (that can then be configured via software) so that the user does not have to worry about where they originate within the SOC.

Example:

1.

Pin 42 (input)
PWM0
Alternate function:

  SPI_CS (slave only) for SPI_2

2.

Pin 43 (input)
GPIO
Alternate functions:
  A/D converter input
  XTALO32K

Dual Function of the same pin (output)

Low-power oscillator (LPO)
Alternate functions:
  P12
  P26

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Anonymous
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Thank you for your support.

So if I want to use PIN#42 as PWM0, should I keep N/C PIN#43?

Also if I want to use PIN#44 as ADC input, is it okay to leave PIN#1 open?

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Anonymous
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Hi,

I'd like to have your advice about my latest questions.

If PIN#42 and PIN#43 are connected in the module, is it okay to leave unused pin open?

Or should I keep it GND to prevent unexpected noise?

Regards,

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Left as a NC should be fine as the pins are shown with no additional termination on the original SPIL schematic here: Sample BCM20732S PCB Layout

module-schematic.png

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StSm_298421
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10 replies posted 5 replies posted 10 questions asked

I've been rather confused by this whole discussion.

dmiya wrote:

"I understand that PIN#42 and #43 are separated on BCM20732S module.

But they are from same pin(#32) of BCM20732 chip. Please see 20732 SOC datasheet.

So I assume when I use PWM0 from PIN#42, same signal will appear on PIN#43.

Is my understanding correct?"

to which mwm_mmfae wrote

"Correct."

However, it seems unlikely that physical pin 1 of the SoC is routed to both physical pin 1 and pin 44 of the SiP, and that physical pin 32 of the SoC is routed to both physical pin 42 and 43 of the SiP. So is dmiya really "Correct" in his understanding here? I understand that you don't want to expose the internals of the SiP, but there seems to be an assumption here that the SiP contains the SoC, which is clouding the issue.

It looks like if you want to output PWM0's signal on physical pin 42 of the SiP, you have to do so using P26, because that is the only port where PWM0's signal is routed to. P26 could be routed to physical pin 43 of the SiP also, but pin 43 can also be configured as the crystal oscillator output, or you can put GPIO P12's signal on it.

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P12/P26 map to seperate physcial pins, but are Dual bonded internally, so only one of two is available.

The SIP definitely contains the SOC die, and we provide both datasheets here on the website, so this seems to cause alot of confusion for users.

I've attempted to explain the mapping between the SoC and the SIP here: BCM2073XS GPIO Basics

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thanks for the reply. So we need to consult both the SoC and the SiP data sheet to understand the restrictions on the those two pins? From the SiP data sheet alone, it looks as if P26 can be routed to pin 42, and P12 to pin 43. But if the P12 and P26 are both bonded to pin 32 of the SoC, then we're left with few choices. If we want PWM0 on pin 43, we have to route P26 there. If we route P26 there, then P12 cannot be enabled. Our only choices for pin 43 of the SoC are a duplicate of P26, or the output of the crystal oscillator.

Since P12 and P26 are dual-bonded to pin 32 of the SoC, why is P12 not listed as an option for the SiP at its pin 42?

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