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Smart Bluetooth

joki_2146851
New Contributor II

I noted the suggested layout on the datasheet the problem is that I need the module to sit on a PCB that is 10mm wide, but can be as long as 25mm. Is there a general guideline for a non-square layout?

THanks,

Joel

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1 Solution
Anonymous
Not applicable

Hi Kelvin,

  Actually my connection to the 'L-Shaped' GND plane is on Layer 2.  Realistically it should not matter which layer you put it on it is just a GND plane the primary key is for the L shape try not to run traces through that portion of the GND plane.

Frank

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Anonymous
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Hello Joel,

  We get a lot of questions about the GND & Keepout areas shown in the TRM.  First keep in mind that this is the 'recommended' layout for maximum RF performance to get maximum range, ~150ft / 50m.  This is not to say that this is the ONLY layout that will work just what is recommended for maximum antenna efficiency.  If you are willing to compromise a bit on range then there are other scenarios that will work.  Taking a look at the parameters that are recommended for the PCB layout lets consider what should be a good option to explore.

pastedImage_4.png

So if you align side A at the edge of your PCB you have 6.5 + S + H = 12.1mm  So we are 2.1mm over your 10mm requirement.  Something that would be worth exploring is to reduce S & H by 1.05mm thus squeezing in your 10mm width PCB.  If you have the capability you may want to experiment with some different options.  One other item to keep in mind is that the L shaped GND plane does not have to be on the top layer.  This could also be on the 2nd layer possibly.  This would be useful if you need to place components in this area.  In conclusion I have not necessarily implemented this but again if you are willing to compromise on Maximum range there are other options that can work for the GND/Keepout areas.

Regards,

Frank

pastedImage_14.png

MichaelF_56
Moderator
Moderator

Note also that the L-shaped ground plane is required for the embedded PCB antenna.

It's also my understanding that the simulated antenna efficiency will be around 10% when side A is not located at the board edge. With that said, the datasheet does not specify minimum dimensions for the Keep-out area along side A; I know from working with other customers that the minimum is 5 mm.Lastly, the Keep-Out area is a void in the copper on all layers.

We can also provide the .brd/PCB file if needed.

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Anonymous
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mwf_mmfae "the datasheet does not specify minimum dimensions for the Keep-out area along side A; I know from working with other customers that the minimum is 5 mm"

Did you really mean 5mm keepout area on side A? That would make side A keepout area thicker than the rest.

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joki_2146851
New Contributor II

Thanks for the quick response. I am willing so sacrifice the maximum range. I need and really only want <5M range (direct line of sight so this will be longer for multipath and also the device is handled so may be obscured by the hand).

Also one further question I have is whether or not the whole pink area is a keep-out area, or just on side A? Also if I have traces coming out of the chip (as is expected to talk to peripherals for general purpose IO and ADC), what is the preferred path? underneath the chip on the bottom layer, or on top with the ground plane on the bottom layer?  Is it possible to get a reference layout for connection to the module and suggestions for bypass capacitors for the module? Also, Is there a description of what the test pin does (not complete in the module datasheet)? If I want to have programming pins to reprogram on the board is that possible and is there a note or guidance on that?

Thanks,

Joel

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Anonymous
Not applicable

For the programming question I think it is best to post this as a separate topic.

Hello Joel,

  The Keepout area is to be void of copper.  For your case of having such a short range you can follow the guidelines below for routing signal traces.  As Mike indicated I can send you a *.brd file and *.dsn file shows the PCB layout of a PCB with the SiP on it.  If you want this you can send me a message and I can shoot it to you. 

For the Test Pin I would just leave this unconnected or put a jumper as a means to pull this high if you want to put the 20732 into a TEST MODE.  To the best of my knowledge there is not an automated/pre-programmed 'Test Mode'.  This is more for manufacturing/test to be able to put the module into a Test Mode that you would define based on reading this pin. 

  1. The L-shape GND plane is required for integrated antenna and please must keep the L-shape GND plane continuous, do not cut off the GND shape due to routings.
  2. The L-shape GND plane is required (Green color area) to enhance the performance of the integrated antenna. If the L-shape GND plane is arranged on top layer of PCB, It’s not recommended to place components in this area. If components need to be mounted in this area, the L shape GND plane should be arranged in bottom layers and avoid a GND plane on top layer. (This is to ensure the L-shape GND plane for antenna is continuous.)
  3. It is fine to bring signal traces out of module from Side B (between Pin#16 and Pin#19), Side C (between Pin#27 and Pin#31) and Side D (between Pin#37 and Pin#42) with overlapped routings to minimize the area metal traces occupied in the keep-out area.

  Please do not bring signal trace from Side A.

pastedImage_0.png

Regards,

Frank

joki_2146851
New Contributor II

THanks for the answers,  Please send me the design file you have, if you have a gerber that would be good or dxf as I probably don't have the same pcb design package as you.

Cheers,

Joel


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Anonymous
Not applicable

Hi Frank,

What is the recommended pad pattern under the SIP itself? As close to a solid plane as possible, as little copper as possible, or a specific pattern (like the L-shaped ground)?

Excluding the VBAT on pin 3 and the I/O on pin 1, side A is all GND; what's the recommended way to get a solid ground there without encroaching on the keepout area?

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joki_2146851
New Contributor II

Can you make the chip disappear in the picture you posted so I can see how power and gnd is delt with under the module.

Thanks,

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MichaelF_56
Moderator
Moderator

I will work with the local Broadcom support team and see if we can get the module PCB files over to you (Gerbers and Allegro). Unfortunately, we cannot post these directly to the forum.

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Anonymous
Not applicable

Could I also get those geber files? I'd greatly appreciate it.

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Anonymous
Not applicable

Hi,

Is there a DXF file for the BCM20732S? I saw on data sheet all dimensions for the module but it's still missing some data like the position of central pads from the edges.

Thanks,

Robson

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Anonymous
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Hello Rtenedini,


Here is a sample set of Gerbers for the BCM20732S:

Sample BCM20732S PCB Layout

This is an inital BLOG Post, but it should get you started

Hope this helps

JT

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Anonymous
Not applicable

Good morning, Frank,

Thanks a lot for clarifying the layout.

Could you please send me the gerber files (*.brd file and *.dsn)?

Thanks again, have a great weekend.

Myron

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Anonymous
Not applicable

Hello Myron,

  The PCB files are at the following link.  The *.dsn file is not currently there but should be posted shortly.

Sample BCM20732S PCB Layout

Regards,

Frank

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Anonymous
Not applicable

Another question about BCM20732S Technical Reference Manual, page 22:

Is there the top or bottom side IC orientation shown on the Figure 8?

Thanks,

Myron

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Anonymous
Not applicable

Hi Frank,

It confused me when comparing your layout to the layout from Broadcom. According to Broadcom, the small GND trace was coming out from side D and your was coming out from side B.  Maybe it is best to clarify that the Small Trace came out from pin #17 (side B) then travel toward direction of pin 18 or the Small Trace came out from pin #38 (side D) then travel toward direction of pin 37?  Please confirm that Blue Components were on the Bottom Layer or Top Layer of the board?

Thanks a lot,

Kelvin

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Anonymous
Not applicable

Hello Kelvin,

Frank and I will investigate and get that confirmation for you.

Thank you.

JT

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Anonymous
Not applicable

Hello Kelvin,

  The issue I believe you are having is that what is called Side A, B, C, and D various from what documentation you look at.  Side A in my book should be pins 1-12, Side B pins 13-22, Side C pins 23-34, and Side D pins 35-44.  That being said you will see from the 2 images below the first being the *.brd file that shows the Top Layer(Blue) and the 2nd Layer(Pink) that the GND trace to the 'L Shaped' GND plane comes off of PIN 17 connects to a VIA and is routed out under Pin17 on the second layer.  What I have done on my footprint it made keepouts for sides B and C which is exactly what you see in the *.brd image shown below.

pastedImage_0.png

For the Altium footprint I created you will see the PINK Keepout areas that restricts traces to essentially be between pins 16-19 with a little bit of wiggle room and then pins 27-30 with a bit of wiggle room.  You can see I have created a polygon keepout on layer 1(RED Dashed line) in the shape of the L shaped GND plane just as has been done on the brd file.  I then also created polygon pour cutouts for layers 2,3,and 4 for the keepout area similar to that of the brd file.

pastedImage_1.png

So an actual implementation using this footprint would look something like this...

pastedImage_2.png

Regards,

Frank

Anonymous
Not applicable

Hi Frank,

Thank you very much for your time.  Your explanation was so clear and it solved my confusion from the SIDE LABELS.  I have another question on the L-Shape that you suggested to move L-Shape to the Bottom Layer.

Could I move The GND L-Shape to Internal Layer, layer 3 or 4? My board has 10 Layers.

Regards,

Kelvin

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Anonymous
Not applicable

Hi Kelvin,

  Actually my connection to the 'L-Shaped' GND plane is on Layer 2.  Realistically it should not matter which layer you put it on it is just a GND plane the primary key is for the L shape try not to run traces through that portion of the GND plane.

Frank

View solution in original post

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Anonymous
Not applicable

Hello,

Could I have PCB layout for 10x20mm size?