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SRAM Forum Discussions

SRAM Forum Discussions

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MAO
SRAM
Assert CS(chip enable) and OE (output enable) pinsIs it possible to continuously read the data signal by switching the address signal? (Page Lead) Show More
Saidev
SRAM
Hi, I'm currently working on CY7C1471BV33-133BZI SRAM. Interfaced with MPC5777C power architecture via EBI. I'm using Chip select 0 for communication,... Show More
ErezN
SRAM
Hi, CY7C1168KV18 has 16 pins for VDDQ and 10 pins for VDD. In the recommended decoupling capacitors scheme (in AN4065) there isn't capacitor for each ... Show More
Belgacem
SRAM
HelloI need your help to find my SRAM componnent in ordre to change it with another compatibility pin to pin and the same functionnalities.If I unders... Show More
SebastienG
SRAM
Dear Mrs, Mr, I would like to know if the SRAM reference's below from Cypress are strictly the same since the acquirement by Infineon (no change of te... Show More
MAO
SRAM
About the simulation model of CY62158ELL-45ZSXI I had the following VHDL, but is it possible to simulate with IBIS? If possible, I would like to recei... Show More
MAO
SRAM
The customer wanted to use the IBIS model for SI analysis, so I was irritated to ask for materials. Isn't it wrong with the following file? Also, I g... Show More
aman
SRAM
Hi We are using the CY7C4122KV13/CY7C4142KV13 SRAM in our design, with the address parity logic enabled. For the same:1) We need the switching charact... Show More
shma_1538871
SRAM
HI All I'd like to confirm whether CY62147GN30-45BVXI can support dual CE. Ordering Code Definition shows 62417"2" can support Dual CE. CY62147GN30 do... Show More
furkanari1
SRAM
Hi!   I have already seen "SRAM Board Design Guidelines (Whitepaper)" document and it does not provide any information about length mat... Show More