SRAM Forum Discussions
Cypress has introduced the newly designed spreadsheet to calculate the power consumption and junction temperature for Sync SRAM devices.
The following link will provide the options for both the HTML and Spreadsheet tools.
http://www.cypress.com/?docID=23984
(1) Click this link to download the html file.
(2) Open the html file to get a webpage.
(3) Find the spreadsheet file for power calculation.
Thanks,
PRIT
Show LessHi.
Some of Delta39K Family has Self-boot in one chip.
Is it possible to access data on flash memory from the implemented system. Is there any possibility to use data stored in flash memory implemented by the unit? I want use some part of integrated self-boot memory as "read only" memory.
How hard it can be?
Sorry for My English.
Reagards.
QDR Consortium
QDR (Quad Data Rate™) SRAMs are a family of SRAMs with separate Inputs and Outputs that each operate at Double Data Rates and are optimized for High Performance Networking Applications
In 1999, the QDR SRAM Co-Development Team was created to define a new family of SRAM architectures
for high-performance communications applications. Participating companies work closely together to ensure multiple sources for the new QDR SRAMs by developing pin- and function-compatible products. The QDR family of SRAM & products incorporates extensive input from networking industry leaders. QDR SRAM devices have two ports running independently at twice the rate of conventional synchronous memories, resulting in four data items per clock cycle. The QDR SRAM family of products includes Quad Data Rate and Double Data Rate common and separate I/O definitions. Depending on the application, products in the QDR SRAM family can more than double SRAM device efficiency per pin.
Click on the link below to access the QDR consortium website :
Show Less
Hi,
Please see the below link for an application note that discusses a typical Battery-backed SRAM application and some Best-Practices for SRAM design-in in such applications.
http://www.cypress.com/?rID=12710
Thanks!
Show LessThe below tool enables calculation of the Core power, Output switching power consumption, Input & Output termination power dissipation and Junction temperature for Sync SRAMs.
http://www.cypress.com/?docID=23984
This tool includes the link for the tool which calculates, extrapolate IDD values for any arbitrary Frequency below the max frequency specified in the Data sheet.
Please refer to the respective product datasheets to get the Vdd voltage, Frequency and Idd current used in the formula.
Show LessThe below newly designed tool calculates extrapolate IDD values for any arbitrary Frequency below the max frequency specified in the Data sheet,
http://www.cypress.com/?rid=54537
Please, refer to the respective product datasheets to get the Frequency and Idd current used in the formula.
Show LessDid you know that Cypress MoBL SRAM's are very popular for their use in BBSRAM (Battery Backed SRAM) designs? Please see Application note http://www.cypress.com/?rID=12710 that discusses some Design considerations for such applications.
Show LessDid you know that Cypress products are available for sale in Wafer and Die form? These are typically assembled by vendors with other devices (in similar die form) into a Multi-Chip module (MCM), which helps in reducing board space.
Please contact www.cypress.com/support with your requirements or for more details.
Thanks,
-Anuj
Show LessCypress continues to expand it's portfolio of Low Power SRAM's with a 128 Mbit SRAM (4Mb x 32 configuration). The part is called CY62192ESL. Production ramp is expected from October 2011.
Show LessNo, we do not have a standard power down sequence for SRAM's.