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Dear engineers of cypress,
I have met some issues when using the CY7C1470V33.I have past the verilog model test ,but no data could be written in the sram on the board.During the period of testing ,I have set the output of fpga to the pin "zz" is 0 ,1 and non-connnected,the phenomenon is still no changed and no data were written in the sram.I found the test on the datasheet the voltage of pin "zz" is less than 0.2 v.
So what is the low voltage standard value of the pin "zz"?would you please give me some advices about the question?
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- Tags:
- sync sram
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Hi,
As the datasheet states the VIL value ( Input Low Voltage) value for zz pin or any pin for the device is 0.8V for a 3.3V device. Since the MPN you are mentioning also has a errata associated with it i request you to go through it once in the datasheet. The pin needs to be at Low or High voltage as per the requirement but do not leave the pin as unconnected/ floating as it can lead to errors. Can you once tie the ZZ pin externally to GND and check
To debug your issue can you kindly check and provide us
1) The power up and power down waveform for the device.
2) The wave form for the ZZ pin along with other control signals like WE, CE, OE etc for a read/write operation on the device.
Thanks,
Pradipta.