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Hello,
QDRII+ Sram Q[17:0] and CQ outputs need ODT on the FPGA/ASIC side ? If yes, how much? 40 ohm, 50ohm ?
Best Regards,
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- odt
- sync srams
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Hi Doner,
The Data output (Q
In the case of FPGA/ASIC without ODT, Cypress recommends that you terminate (pullup to VTT) the Data output (Q
Thanks,
Pradipta.
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Hi Doner,
I it will depend on the part firstly. If it is a non ODT part then it will not be required. If it is an ODT part then it will be required. We also have an app note on this. Kindly go through it once.
http://www.cypress.com/file/38611/download
Thanks,
Pradipta.
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Hi Pradipta,
I read the that app note. Thank you. It is an ODT part. Then how much ODT resistor should I use on the ASIC/FPGA side for Q[17:0] and CQ lines?
Thank you.
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Hi Doner,
You need not connect any resistor for those lines. We also have an app note on design guidelines for these parts with reference schematics.
Kindly go through it once and let us know for any queries.
http://www.cypress.com/file/38596/download
Thanks,
Pradipta.
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Dear Pradipta,
Thank you for document. I have read that doc previously. I try to exactly ask below sentence from document, page24.
The Data output (Q
If yes, how much ODT is required for these FPGA/ASIC pins? 40 ohm, 50 ohm? Does It depend on the (Q
Thank you,
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Hi Doner,
The Data output (Q
In the case of FPGA/ASIC without ODT, Cypress recommends that you terminate (pullup to VTT) the Data output (Q
Thanks,
Pradipta.