PCB design considerations for CY7C1061G-10ZXI

[furkanari1]

Hi!

I have already seen "SRAM Board Design Guidelines (Whitepaper)" document and it does not provide any information about length matching.

I am aware that I need to use length matching so that bad data is not sampled while reading or miswriting. But I can't find any documentation or information about what the length matching will be as a unit of time.

- Is it any need for length matching in the PCB layout when using these SRAM's?

Thanks and Regards,

[furkanari1]

I have already seen "SRAM Board Design Guidelines (Whitepaper)" document and it does not provide any information about length matching.

I am aware that I need to use length matching so that bad data is not sampled while reading or miswriting. But I can't find any documentation or information about what the length matching will be as a unit of time.

- Is it any need for length matching in the PCB layout when using these SRAM's?

Thanks and Regards,

[Ritwick_S · Accepted solution]

Hi @furkanari1 ,

Yes, length matching must be done. Kindly refer to the below thread for more details.

https://community.infineon.com/t5/SRAM/What-is-the-length-matching-requirements-for-the-Address-Data...

Thanks,

Ritwick