Mirror sram

AbSh_2443496 · ‎May 31, 2020

Hi,

I am using CY62177EV30LL in one of our applications and we would like to use two of these chips for increased memory.

In terms of layout, I am thinking, can we place one on the top layer and one on the bottom layer? We would swap the address and data lines (so that we can connect them through same vias), but because access is random, it should not matter, right?

I am attaching my proposed schematic. Only exception would be I/O11 and I/O15, which cannot be mirrored.

Has anyone here done that and would any of you be able to suggest if there should be any concerns.

Thanks,

AQ

PradiptaB_11 · ‎Jun 01, 2020

Hi,

You can place the memory on top and bottom sides of the board. It allows the layout to share vias on address and data pins, reducing trace length and simplifying routing. The data bus pins on a memory device may be swapped if the memory is operating in a word mode since it does not matter which data bit is connected to a particular bit on the controller. The address lines may also be swapped to simplify layout. If the memory is running as a word access, any line may be swapped. Stress keeping all trace lengths equal to improve timing margins. All signals to the part that are latched by a clock should have the same length, not just address and data bus.

Thanks,

Pradipta.

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Mirror sram

Mirror sram

Re: Mirror sram