Default SPI Setting in CY14V101QS

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Avinash_John
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Hi, I'm using the CY14V101QS (16 Pin) 1Mbit QSPI SRAM. On power up, by default in which mode is it coming up ?
I wanted to confirm if it does indeed come up in SPI (MOSI, MISO, CSB, SCK) configuration by default on power up, or does it move to QSPI without first writing some register in SPI.

if indeed a reg write is required, can this be saved/flashed ?
Or is it that always on power up, you communicate through SPI, write a register and then move to QSPI ?

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Ritwick_S
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100 solutions authored 25 likes received 250 sign-ins

Hi @Avinash_John ,

 

On Power-up, the device will be in SPI I/O mode. You have to enable QPI using QPIEN instruction, and then you have to set the Quad bit in the Configuration register. The quad bit is non-volatile and is saved to non-volatile memory only after a STORE operation. So, when you again power up the device, you just have to again enable QPI, and no need to set the Quad bit again.

 

For more information, kindly refer to the datasheet. (Link- https://www.infineon.com/dgdl/Infineon-CY14V101QS_1-Mbit_(128K_8)_Quad_SPI_nvSRAM-DataSheet-v14_00-E...

 

Thanks,

Ritwick

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Ritwick_S
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100 solutions authored 25 likes received 250 sign-ins

Hi @Avinash_John ,

 

On Power-up, the device will be in SPI I/O mode. You have to enable QPI using QPIEN instruction, and then you have to set the Quad bit in the Configuration register. The quad bit is non-volatile and is saved to non-volatile memory only after a STORE operation. So, when you again power up the device, you just have to again enable QPI, and no need to set the Quad bit again.

 

For more information, kindly refer to the datasheet. (Link- https://www.infineon.com/dgdl/Infineon-CY14V101QS_1-Mbit_(128K_8)_Quad_SPI_nvSRAM-DataSheet-v14_00-E...

 

Thanks,

Ritwick

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