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Hi Team,
We are going to propose "CY62148EV30LL-45ZSXIT" as a replacement for our current production renesas SRAM "RMLV0408EGSB-4S2#HA1". We need some parameter clarification
1. tOW - Output enable from write end (nS) , this timing parameter is not present in the cypress datasheet, in renesas datasheet its 5ns, Below is the image snipped from renesas datasheet where tOW is highlighted.
Could you please provide the timing of that parameter.
2. In capacitance, cypress datasheet provide as input and output capacitance as separate but in our current renesas part input and input/output capacitance is mentioned.
I want to know the input/output capacitance value, so that I can compare both the parts.
Solved! Go to Solution.
- Labels:
-
Memory ASYNC
-
Memory SRAM
-
Memory SYNC
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Hi,
1) In our datasheet you can refer to the parameter tLZWE. It is a minimum of 10 ns.
2) We need to check with our team if we have this data internally with us.
Thanks,
Praditpa.