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yaya_4678691
Level 1
Level 1

我在用FPGA控制zz做sram的写读测试时发现不管zz接1 0或者不接时sram都没有被写进数据,我看datasheet发现测试时zz接的电压小于0.2V,我想请教下是否zz管脚拉低只能在板卡上接地,对于FPGA的LVCMOS33的0输出不能用于控制ZZ管脚

1 Solution
Roy_Liu
Moderator
Moderator
Moderator
First comment on blog 1000 replies posted 500 solutions authored

看起来和这The low voltage standard of zz pin for CY7C1470V33 是同一个问题,请参考那个帖子的讨论。

Roy Liu

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1 Reply
Roy_Liu
Moderator
Moderator
Moderator
First comment on blog 1000 replies posted 500 solutions authored

看起来和这The low voltage standard of zz pin for CY7C1470V33 是同一个问题,请参考那个帖子的讨论。

Roy Liu
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