CY7C1168KV18 decoupling capacitors.

[ErezN]

Hi,

CY7C1168KV18 has 16 pins for VDDQ and 10 pins for VDD.

In the recommended decoupling capacitors scheme (in AN4065) there isn't capacitor for each power pin.

Should  each power pin (Vdd, Vddq) get 100nF and 10nF decoupling capacitors?

Regarding VTT should each pullups get decoupling capacitor?

Best regards,

Erez

[PradiptaB_11 · Accepted solution]

Hi @ErezN ,

The app note reference schematic makes all the connections of the power pins to one common point and then places the decoupling caps as shown Fig 41 to 44. As there are multiple power pins and not one or two so providing a cap to each power pin might not be feasible on all the PCB so using a common point for say a VDD or VDDQ and adding de-caps there provides flexibility on the board. The same is applicable for VTT as well

Thanks,

Pradipta.

[ErezN]

Thanks