SRAM Forum Discussions

[ErezN]

Hi,

I can't find in the data-sheet CY7C1168KV18 Vref current consumption.

In the application not it is recommended to add to Vref decoupling capacitors total of 12.3uF while in the TPS51200DRC (the LDO for VTT I'm using) the limit capacitance on vref is 0.47uF. Is 0.47uF is sufficient?

Thanks,

Erez

[PradiptaB_11]

Hi @ErezN ,

The LDO that you are using, it has a pin REFOUT, but this is different than the VREF pin on the DDR memory. This two are different entities and do not connect them together. You can check in the DC ratings of both the parts as well. Our VREF pin can take a typical value of 0.75V and max of 0.95V while the LDO REFOUT pin can go up to 1.8V.

So you will need to follow the 0.47uF for TI part and follow our recommendations for DDR decaps.

Thanks and Regards,

Pradipta.

[ErezN]

Hi Pradipta,

1. What is the current consumption of Vref?

2. TPS51200 (Sink and Source DDR Termination Regulator) is dedicated IC for DDR interface and that's why I select it. Vref of CY7C1168KV18 should be one-half of VDDq (1.5V/2=0.75V). The TPS51200 will generate this exact voltage at Vrefout which is dedicated pin for DDR interface. Vo of TPS51200 will generate VTT of CY7C1168KV18.

I'm failed to understand your response.... do you think TPS51200 is not suitable as DDR termination regulator for  CY7C1168KV18?

Best regards,

Erez