CY621472G30-45ZSXI about Level 5 MAO Level 5 Distributor - Macnica (Japan) Jun 29, 2022 09:20 PM Mark as New Bookmark Subscribe Mute Subscribe to RSS Feed Permalink Print Report Inappropriate Content Jun 29, 2022 09:20 PM Jump to solution Assert CS (chip enable), and OE (output enable) pins Is it possible to continuously read the data signal by switching the address signal while keeping it? (Page lead) Solved! Go to Solution. Labels Labels: ispn:35012:1:0 l1:4041:1:0 l2:4046:1:0 l3:4345:1:0 MemorySRAM 0 Likes Reply Subscribe 1 Solution Re: CY621472G30-45ZSXI about Level 5 NaMo_1534561 Level 5 Distributor - Macnica (Japan) Jun 29, 2022 09:37 PM Mark as New Bookmark Subscribe Mute Subscribe to RSS Feed Permalink Print Report Inappropriate Content Jun 29, 2022 09:37 PM Jump to solution The answer is possible. Please refer to Figure 10 in the data sheet below.https://www.infineon.com/dgdl/Infineon-CY62147G_CY621472G_CY62147GE_MoBL_4-Mbit_(256K_words_16_bit)_... View solution in original post 1 Like Reply All forum topics Previous Topic Next Topic 1 Reply Re: CY621472G30-45ZSXI about Level 5 NaMo_1534561 Level 5 Distributor - Macnica (Japan) Jun 29, 2022 09:37 PM Mark as New Bookmark Subscribe Mute Subscribe to RSS Feed Permalink Print Report Inappropriate Content Jun 29, 2022 09:37 PM Jump to solution The answer is possible. Please refer to Figure 10 in the data sheet below.https://www.infineon.com/dgdl/Infineon-CY62147G_CY621472G_CY62147GE_MoBL_4-Mbit_(256K_words_16_bit)_... 1 Like Reply Post Reply
