ASYNC SRAM layout

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Anonymous
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Hi to all,

We are going to use a STM32F2 with a async SRAM CY7C1041GN30-10ZSXI.

It is the first time I work with one of these and I have many many questios: trace lengths should be similar, impedance controlled .....

Do you know any document where I can get the answers for these questions and more tips to take into consideration?

Thanks in advance,

david

1 Solution
PradiptaB_11
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500 replies posted 250 solutions authored 250 replies posted

Hi David,

Kindly go through the below document.

http://www.cypress.com/file/38651/download

Thanks and Regards,

Pradipta.

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