If you are having problems with your installer, check that the download size of the installer is roughly 260MB, installer problems are typically caused by incomplete downloads.
The picture below shows a very common error message. Our SDK utilizes a 32-bit version of an Eclipse based IDE which requires a 32-bit version of JRE to be installed. If you already have the 64-bit JRE installed, you will also need to install the 32-bit version as well. The JRE is designed to allow both 32 and 64 bit variants to be installed on the system.
The WICED Sense kit uses a Silicon Labs USB to Serial Device. The TAG3 board uses an FTDI USB to Serial Device. Both should be installed as part of the SDK 2.2.1 installation process. If not, the FTDI drivers for the TAG3 reinstall them using the file /WICED-Smart-SDK/Drivers/dpinst.exe (make sure you access from the command line). The Silicon Labs USB Drivers can be foundWICED Sense Table of Contents
Everything we have for the WICED Sense, such as schematics, drivers, and Android application source code, can be accessed through theWICED Sense Table of Contents. A great post for the WICED Sense is theWICED SENSE Kit BLOGwhich is like a WICED Sense quick start guide.
Some Android devices appear to have issues pairing to the WICED Sense Tag from inside the app, linked is a work-around that should allow you to connect to your Android device:WICED Sense Android Pairing Work-Around
Sleep Current Consumption is roughly 24uA using the internal power management of the BCM20732.
In 1.5uA deep sleep, the xtal, IR and PWM blocks will be turned off.
The PWM does not operate in sleep or in deep sleep, and the PWM block is not capable of interrupting or waking up the processor.
GPIOs, peripheral uart, IR transmit, Keyscan and quadrature inputs can interrupt/wake the processor.
GPIOs that are output enabled will remain so and drive as configured in sleep/deep sleep.
Sleep operation in BLE Packet Transmissions:
Q: When sending packets periodically for BLE (e.g. 25 ms to 4 seconds), does the BLE stack put the 20732 in 1.5 uA deep sleep mode between the transmissions or is just the sleep mode (20+ uA)?
A: No, when advertising or in connection, the device will not go into deep sleep. However, it will go into other low power modes like sleep and pause based on the connection/ADV interval and other activities. If you want to ADV every few minutes, it is possible to ADV for some seconds, then configure timed wake from deep sleep and then enter deep sleep. After the configured time, the device will be woken up and then the application will be initialized.
Q: In deep sleep mode, the data sheet says core and base are turned off. Does that mean it loses the RAM contents? If so, where does application software store state information when it goes into deep sleep? The EE or an offboard chip?
A: Yes, in deep sleep the chip will lose its RAM contents. When woken up, the application will be loaded to RAM from the NV storage and re-initialized. This is very similar to a power-on-reset except that in the case of a wake from deep sleep, some HW state information is retained so that the application can find out what caused the wake.
Our BCM2073x device includes the ability to wake after configured time.
With the internal clock, this value is anywhere from 64mS to ~36 Hrs.
With an external 32 KHz xtal, 128mS - ~144 Hrs is possible.
PREVENTING THE DEVICE FROM GOING TO SLEEP WHEN USING THE P_UART:
If you are working with the PUART and in particular trying to Rx data with the PUART you will need to ensure that the following functions shown below are added into your PUART_Init() function.
You will also see these functions in the 'uart_firmware_upgrade' example.
The reason these are needed is otherwise the Device will put the PUART to sleep.
These functions disable the device from putting the PUART to sleep:
Put these inside of your PUART_Init() function devlpm_init();
// Since we are not using any flow control, disable sleep when download starts.
// If HW flow control is configured or app uses its own flow control mechanism,
Determination of Wake time from deep sleep is a combination of many factors:
Since this involves a full boot, it depends on whether you are using the BCM20732S/36S modules or BCM2073x SOC design, EEPROM or Serial flash (application + patch size), speed of NV access.
The 20732S contains an EEPROM internally:
Boot Time: boot time* ~= 50ms + ~45mS/KByte of application + patch code (whats printed at the end of a build) assuming default I2C speed (400 KHz).
The 20732 chip-on-board design:
You can increase the read speeds to 1MHz instead of the default 400 KHz. But the boot time will not reduce by 2.5 times because there is a lot of processing involved during this process. So this will be 50mS + ~30mS/KByte of app + patch code.
Serial FLASH Case: When NV storage is serial FLASH, boot time ~= 50mS + 4mS/KByte of code.
boot time ~= 20mS + ~35mS/KByte of app + patch code @ 400 KHz. If I2C speed is increased to 1 MHz, this should be ~ 20mS + 23mS/KByte.
Serial FLASH Case:
boot time ~= 20mS + 900uS/KByte when SPI speed is 12 MHz.
Note: *boot time here is the time from wake interrupt to application create call.
Advertising and Sleep Modes:
When advertising (ADV) or in connection, the device will not go into deep sleep.
However, it will go into other low power modes like sleep and pause based on the connection/ADV interval and other activities.
If you want to ADV every few minutes, it is possible to ADV for some seconds, then configure timed wake from deep sleep and then enter deep sleep.
After the configured time, the device will be woken up and then the application will be initialized.
Crystal and Sleep:
The external 32KHz oscillator is optional with respect to timed wake from deep sleep.
The internal 128KHz LPO is used for sleep and timed wake from deep sleep