BGT60LTR11AIP SPI Communication

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MehmetSezer
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hello ,
ı want spi communication with bgt60ltr11aip and stm32 microprocessor . I do change the resistors but the radar all registers has 0xffff .  What should I do to receive IFI and IFQ signals? I can share my spi code if needed.

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Montassar-BR
Employee
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Hi @MehmetSezer 

In SPI pulsed mode, the ADC of I&Q is triggered by the device internal state machine. Thus, the I&Q signals are sampled by the internal detector, so you just need to read the ADC registers Reg40 & Reg41 for I&Q signals respectively. 

In SPI CW mode, you need to enable internal ADC manually, by doing the following:

  • enable bandgap and local ADC clock (Reg34)
  • wait until bandgap is available (Reg36)
  • enable ADC (Reg34)
  • wait until ADC is ready (Reg36)

You can write/read multiple registers in the same SPI-access, only if you use the SPI burst mode.
The whole burst transfer is performed in a single SPI frame, so the chip select signal (CS) goes LOW at the beginning and stays LOW until the end of the burst transfer.

Please refer to the "AN625 - User's guide to BGT60LTR11AIP" document, "3.1.3 SPI burst mode" section, or check your microcontroller SPI peripheral documentation for more details about SPI burst mode.

Hope that helps.

Cheers,
Montassar.

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Yashraj_P
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Hi @MehmetSezer ,

Are you following the proper SPI initialization sequence given in User Guide?

Could you please let us know, in what mode are you setting the BGT60LTR11AIP, Pulsed mode or CW mode?

For reference you can go through the following threads: 
https://community.infineon.com/t5/Radar-sensor/BGT60LTR11AIP-SPI-Mode-Programing/m-p/345780

https://community.infineon.com/t5/Radar-sensor/CW-Mode-with-SPI-Mode-BGT60LTR11AIP/m-p/371524

If you still fail to initialize in SPI mode, please share your code.

Thanks and regards,
Yashraj

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MehmetSezer
Level 1
Level 1
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Hi ,

First of , thank you for your feedback.

I do change QS1,QS2,QS3,QS4, 100K ohm to VDD all of them so J1 J2-->DNP , R43 R3->100K , R10 R20-->DNP , R9 R19-->10K and sensor connectors P1 8(BGT SCK) , 10(BGT MOSI) , 12 (BGT MISO) , 18 (BGT SELECT) connect to stm32 for spı communicate between level shifter.Radar shield VDD and gnd connect at Castellated holes.

AN625 also mentions "Read quad state inputs" but I don't understand how to read it. Which register should I read? Is this a register? It say adar shield initially "write reg1 0x0000" , is there no need for anything else? My aim in my project is to obtain instantaneous I and Q signal voltages. Do you have any suggestions for this? Is SPI only used for radar gui, can I use it with an external processor? I am sharing my STM32 spi read and write codes.

 

uint16_t spi_read(uint8_t addrss){
//addrss = addrss | 0x70;

uint8_t datas[2]={0};
uint16_t read_data;

uint8_t communicationBuffer[3];

communicationBuffer[0] = addrss << 1;

HAL_GPIO_WritePin(GPIOA, SPI_CS_Pin, GPIO_PIN_RESET);

HAL_SPI_Transmit(&hspi1, communicationBuffer, 1, 100);

HAL_SPI_Receive(&hspi1, (uint8_t*)&registerMap[addrss], 2, 100);

HAL_GPIO_WritePin(GPIOA, SPI_CS_Pin, GPIO_PIN_SET);

read_data = datas[0];
read_data = read_data << 8;
read_data = read_data + datas[1];
return read_data ;
}

 

 

int spi_write(uint8_t addrs ,uint16_t value){
uint8_t data[3] = {0}; // data array reset

data[0] = addrs << 1; // last bit is high .
data[0] |= 0x01;


data[1] = value ; // 16 bit data is divided 8 bit datas .
data[2] = value >> 8;

HAL_GPIO_WritePin(GPIOA, GPIO_PIN_1, GPIO_PIN_RESET);
HAL_SPI_Transmit(&hspi1, data, 3, 100);
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_1, GPIO_PIN_SET);
return 1;
}

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Hi @MehmetSezer ,

As mentioned in the User Guide, after connecting the QS1,QS2,QS3,QS4, to 100kOhm to Vdd. The sensor should be in SPI mode. 

Clear the Reg0 and Reg1 registers.
You can read the Quad states via Reg56. 
C1.PNG
And can set the Right threshold via Reg2 and hold time via Reg10. For other registers settings please go through the Section 3.2 in the User Guide to initialize the SPI mode. 

Thanks and regards,
Yashraj

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MehmetSezer
Level 1
Level 1
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Hi @Yashraj_P ,

First of , thank you for your feedback.

I had a wrong connection. connecting the QS1,QS2,QS3,QS4, to 100k Ohm to Vdd thats working .
I read register 56 = b543 ı think that's correct but ı can not read register 38-53 . registers 38 to 53 all time returned 0x0000 why ?
ı want multiple write register but I can not write after register 0 and 1 reset why ?
What values should I write to which registers to start transfer data ? Can your help me ?

Thanks and regards,
Mehmet Sezer.

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Hi @MehmetSezer ,

In the User Guide, the possible state of QS1 is mentioned as follows:
C3.PNG

So if it is in 100k Ohm to Vdd mode, the senor needs an external clock. Please connect QS1 to Vdd, and check again. That will be default mode. After that try setting all the other registers as mentioned in previous reply. 
Hope this helps.

Thanks and regards,
Yashraj

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MehmetSezer
Level 1
Level 1
10 sign-ins First reply posted 5 sign-ins

Hi @PalY ,

we are set to REG 15[14] and its working but I was read only REG40-41 . how to read all register . I dont write multiple register why ? Its don't worked cw mode why ? I don't understand how burst mode works? can you explain ?

Thanks and regards,

Mehmet Sezer

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Montassar-BR
Employee
Employee
5 questions asked 250 sign-ins 25 likes received

Hi @MehmetSezer 

In SPI pulsed mode, the ADC of I&Q is triggered by the device internal state machine. Thus, the I&Q signals are sampled by the internal detector, so you just need to read the ADC registers Reg40 & Reg41 for I&Q signals respectively. 

In SPI CW mode, you need to enable internal ADC manually, by doing the following:

  • enable bandgap and local ADC clock (Reg34)
  • wait until bandgap is available (Reg36)
  • enable ADC (Reg34)
  • wait until ADC is ready (Reg36)

You can write/read multiple registers in the same SPI-access, only if you use the SPI burst mode.
The whole burst transfer is performed in a single SPI frame, so the chip select signal (CS) goes LOW at the beginning and stays LOW until the end of the burst transfer.

Please refer to the "AN625 - User's guide to BGT60LTR11AIP" document, "3.1.3 SPI burst mode" section, or check your microcontroller SPI peripheral documentation for more details about SPI burst mode.

Hope that helps.

Cheers,
Montassar.

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