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Anonymous
Public Archive
        I had develop a visual recognition using Microsoft visual studio 2008 C++ with opencv library. I also develop a computer controlled gating sys... Show More
Anonymous
Public Archive
Hello! I encountered a problem when working with CY7C68013. There are CY7C68013 and FPGA on my board. Data is transferred from the computer to the FPG... Show More
Anonymous
Public Archive
 Dear,all    We encounter a problem with the USB 3.0 Slave FIFO mode. Any help or input on this is very appreciated.    The periheral equipment is FPG... Show More
Anonymous
Public Archive
Hi,    I am developing a platform using CYUSB3014 and the 16bit SlaveFIFO interface will be used.    DQ[31:16] are free. I want to use DQ19 (GPIO[36])... Show More
Anonymous
Public Archive
WICED™ SMART Software Development KitThe WICED™ SMART SDK includes the tools and software needed to create BT and networking applications for a wide r... Show More
Anonymous
Public Archive
WICED™ SMART Software Development KitThe WICED™ SMART SDK includes the tools and software needed to create BT and networking applications for a wide r... Show More
Anonymous
Public Archive
        Hello, I was trying to update my Eclipse and the following error appeared regarding the Zylin debugger plugin: No repository found at file:///... Show More
Anonymous
Public Archive
I use the bulkloop between EP0 and EP2(Autoin ,2 buffers) through a vender command,but when I want to read data from EP2,it sometime return random dat... Show More
Anonymous
Public Archive
i'm using the cy7c67300 chip and downloaded the firmware to the eeprom,but now i want to erase the eeprom for cycle use it. i know how to erase the ee... Show More
Anonymous
Public Archive
Hello.    I am trying to use the GPIF II Designer and Eclipse in order to design a custom protocol.    I have done a very simple state machine in orde... Show More