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Power Management ICs Forum Discussions

pistons7
Level 3
Level 3
50 sign-ins 5 likes given First solution authored

I ran "SPI_TLF_1_KIT_TC397_TFT" on the evaluation board and got an error.
if(getCurrentStateTLF35584(&g_tlfDevice) != DeviceStateTransition_normal)
{
while(1);
}
Enters an infinite loop at the part of .

If you check "getCurrentStateTLF35584", the NO_OP flag is 1.
This means "Requested state transition via DEVCTRL & DEVCTRLN could not be
performed because of wrong protocol.".

Is the code for DEVCNTRL/DEVCTRLN in the sample code wrong?

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1 Solution
Polimera
Moderator
Moderator
Moderator
50 sign-ins 10 solutions authored 25 replies posted

Hi Postons,

Thanks for the query. Sorry for the late response. 

Requested state transition via DEVCTRL & DEVCTRLN could not be
performed because of wrong protocol.

In order to request a state transition and/or a change of the LDO configuration the request data have to be written
to two separated registers DEVCTRL and DEVCTRLN after each other consequently. The data written to
DEVCTRLN have to be inverted bitwise compared to the data written to DEVCTRL. The request will be only
accepted when the two registers are written consecutively after each other (first DEVCTRL and second
DEVCTRLN) and will be taken over with the rising edge of the CS at the end of the second command.
In case of an invalid request (wrong sequence or DEVCTRLN not inverted to DEVCTRL) it will be rejected, an
interrupt is generated and the corresponding status flag (NO_OP) is set. 

Please check this in the code , whether it is implemented properly or not

 

Regards,

Kranthi

View solution in original post

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1 Reply
Polimera
Moderator
Moderator
Moderator
50 sign-ins 10 solutions authored 25 replies posted

Hi Postons,

Thanks for the query. Sorry for the late response. 

Requested state transition via DEVCTRL & DEVCTRLN could not be
performed because of wrong protocol.

In order to request a state transition and/or a change of the LDO configuration the request data have to be written
to two separated registers DEVCTRL and DEVCTRLN after each other consequently. The data written to
DEVCTRLN have to be inverted bitwise compared to the data written to DEVCTRL. The request will be only
accepted when the two registers are written consecutively after each other (first DEVCTRL and second
DEVCTRLN) and will be taken over with the rising edge of the CS at the end of the second command.
In case of an invalid request (wrong sequence or DEVCTRLN not inverted to DEVCTRL) it will be rejected, an
interrupt is generated and the corresponding status flag (NO_OP) is set. 

Please check this in the code , whether it is implemented properly or not

 

Regards,

Kranthi

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