Power Management ICs

Hello

I am modelling ICE2PCS05 in PowerESim. I have trouble with frequency setup. The frequency is always about 65 kHz whatever I enter during initialization (I need 220 kHz). Because of this all components values computed for much smaller frequency than I need.  All other values  entered during initialization was accepted correctly. So what should I do to initialize circuit with 220 kHz?

Thank You.

Basically we are looking for LDO to supply MCU and other peripheral where max current requirement is 300mA.

Input supply will go up to 28.5V when battery is in charge condition. This is for 24V battery operated vehicles.

LDO should have capability to sustain cranking noise and should have capability to work with direct battery connection to input pin.

We have check datasheet of all part and found below note

TLS850:

• Automotive or other supply systems that are connected to the battery permanently

• Automotive supply systems that need to operate in cranking condition

TLE4267GM :

• Automotive or other supply systems that are connected to the battery permanently

• Automotive supply systems that need to operate in cranking condition

TLE4476:

Not found

Is it mean only TLS850 has capability to work direct battery and will work with cranking condition?

Does TLS4267GM has only capability to work with direct battery connection and not suited for cranking condition?

What about TLE4476?

In TLE4476 datasheet Page 8, we found that it is required LC circuit to input pin to regulate input noise.

Does it mean TLE4476 required some additional component to input pin and TLS850 and TLE4267 can work without a

LC filter to input line.

Please suggest

Dear Sir, 

If we do not program the address from 0x4001 to 0x402E, 

does it will effect the IC movement?

Best regards,

Lillian 

Hi,

  We're at the point of deliberating the floating power supply (VAA and VSS) design. We'd like to pull up the power pin with an external resistor and capitalize on the internal Zener diode for regulatiing.

Then we find something we couldn't realize that the supplying current the these pins are both around 14.5mA and 1~1.7mA at idle and off status. But the datasheet shows them in 5~7.5mA and 1.5~3mA. I can't realize where the differences between 14.5mA of evaluation board and 7.5mA of specifications. We didn't find similar differences in IRS2092 before.

Thanks for your help,

Ted

Hi Team,

1. when I was trying to write DEVCTRL and DEVCTRLN register with compelementery values and tried to read it back, DEVCTRL register is readable but DEVCTRLN is not readable?
2. Also TLF is in standby mode and when I am giving KL15 TR1, TR2, VREF and COMEN is not getting enabled in INIT state?
3. is there any perticular sequence need to follow for Initialisation of device?
4. Do I have to write all Protected register at time or I can write individual register to enable and disable functionality.
5. Could you please share application notes on this.

Could you please help me to resolve this issue.

Hello, I am using the IRS2452AM in order to make a full-bridge class D amplifier, so I use the BTL mode. However, I don't know what kind of feedback topology is recommended. The IRAUDAMP23 shows how to do a feedback, but the IC is used in half-bridge mode (BTL off, 2 channels). Do you have any solutions ? Thanks in advance.

Hi, Please tell me about the current consumption of the Vcc terminal of ICE5AR0680BZS.

Please tell me about the current consumption of the Vcc terminal of ICE5AR0680BZS.
The current consumption when not switching is described in the data sheet P20, but there is no description during steady switching.
Is it correct to recognize that "Maximum DC current on any pin" on page 19 of the data sheet is 10mA?

Regards,

I see many Xilinx reference designs - https://www.infineon.com/cms/en/product/promopages/xilinx-SoC-FPGA-power-reference-design/xilinx-zynq-ultrascale/configuration-power-map/configuration-table/ - but I do not see one for the XCVU13P - https://www.xilinx.com/products/boards-and-kits/1-18q1pyl.html. Is there a reference design for Xilinx's XCVU13P in process? Thank you.