Power Management ICs Forum Discussions

Hi,

The XDPP1100 provides the method of forced duty cycle T1, T2 for PWM generation. The registers rampX_force_t1 and rampX_force_t2 have an LSB resolution of 5 ns. In the technical reference manual, it is said that "it is possible to provide additional time resolution to both t1 and t2 via rampX_force_duty[5:0] according to Equations (7.8) and (7.9) when t1 and t2 are forced”. You can find it on page 141 in the document.

What's the effective time resolution with this method? How to use this feature and can you elaborate it more in detail?

Is there a Spice model available for this controller, or has anyone had any luck modelling it?

Poweresim is OK, but lacking useful Inductor/Tranformer core models and I've had no luck getting the Web-based TINA thing to work - just keeps throwing licensing errors. As Spice models are available for every other component, it would be really useful to get one for this!

Hi, we are using the TLE7242 IC for Low-Side selonoid driver via 100mR shunt resistor. while drive the selonoid below the 400mA, we cant get the correct value for current feedbacks. Also cant detect the open load status and SPI fault messages OL or SG. While we add an external pull-down resistor to the POSX pin, these two problem was solved. 

Could you please inform me, is this additional pull-down resistor may cause any problem for long-term use?

Hi Infineon Team,

I'm working on a 2Kw EV charger for one of our designs. I'm planning to remove the BMS signal section(R159, R160, R173, R175, Q12 and so on). instead of that, I'm gonna add a power resistor between Bat+ and Bat-. Need your input Regarding this, Please find the application note link and reference images in the attachment.

https://www.infineon.com/dgdl/Infineon-Applicationnote_EVAL_2KW_48V_CHAR_P7_2kw_battery_charger_CoolMOS-ApplicationNotes-v01_01-EN.pdf?fileId=5546d462696dbf120169ba1f4fa14b81