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Power Management ICs Forum Discussions

User22192
Level 1
Level 1
First reply posted First question asked
Hello,

Has someone seen following behavior:

- project board starts ok and I'm able to send the TLF in shutdown state(standby regulator is enabled)
- afterwards I cannot restart the board anymore, not even with a power-on

What I see with the power on sequence is that any output of TLF(Quc, Qco, Qst, etc.) is on for few us then they are off, hence I can not connect to the uc.

Regards.
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1 Solution
AnilKumar
Moderator
Moderator
Moderator
10 likes received 100 sign-ins 50 replies posted

Hello,

Thank you for  posting your query  in Infineon community.

As soon as TLF is powered on, it enters into INIT state, releasing Reset. All regulators are turned on.

But now when TLF is sent to standby_mode, after transition delay time Reset is turned low and regulators are turned off (Observation which u reported).Refer the timing diagram below.

AnilKumar_0-1649312177523.png

 

A valid Wake-Signal will bring the device from STANDBY to INIT state. Refer Section 5.1 Datasheet.

Note: The WAK and ENA input pins are battery voltage level capable. A signal, with a voltage higher than VWAK,hi appliedat pin WAK for tWAK,min represents a valid Wake-Signal. A positive going edge at pin ENA with a rise time tENA,rise represents a valid Wake-Signal.

Reach out to us for any further Query

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1 Reply
AnilKumar
Moderator
Moderator
Moderator
10 likes received 100 sign-ins 50 replies posted

Hello,

Thank you for  posting your query  in Infineon community.

As soon as TLF is powered on, it enters into INIT state, releasing Reset. All regulators are turned on.

But now when TLF is sent to standby_mode, after transition delay time Reset is turned low and regulators are turned off (Observation which u reported).Refer the timing diagram below.

AnilKumar_0-1649312177523.png

 

A valid Wake-Signal will bring the device from STANDBY to INIT state. Refer Section 5.1 Datasheet.

Note: The WAK and ENA input pins are battery voltage level capable. A signal, with a voltage higher than VWAK,hi appliedat pin WAK for tWAK,min represents a valid Wake-Signal. A positive going edge at pin ENA with a rise time tENA,rise represents a valid Wake-Signal.

Reach out to us for any further Query

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