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I use tc377 with TLF35584 .
1,TLF35584 setting
QUC off , QT1/2 off , QCO off , QVR off , QST on
and Go To Sleep via SPI.
I have confirmed that the TLF35584 goes into sleep mode.
2,Next, I set TC377 to Standby.
When the TC377 enters standby, VDD drops and QVR turns on at the same time.
It is speculated that the PMIC detected an abnormality and changed from Sleep to ini state. Please let me know what kind of control should be done to prevent an error from occurring.
Solved! Go to Solution.
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Hello,
Thanks for the information.
Since VCI is not connected, UV of VDD is monitored by Aurix Internal voltage monitoring circuit and reported to TLF via ERR signal which puts TLF to INIT state.
The standby mode is the lowest mode in terms of power consumption, and it requires a specific transition procedure before the actual power mode switch takes place in order to limit the load variation at the supply rails. These procedures correspond to system functions that remain available in each of these modes and typical configuration settings of those functions. In addition, these steps also include the gradual shut-down flow of modules for the reduction of current spikes and spurious emissions which could be the cause of UV on VDD.
Please refer to the section 11.2.3.4.8 "Entering Standby Mode (only VEVRSB domain supplied)" from UM of Aurix to follow the right sequence. Link below
Thanks
Anil
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Hello,
Thank you for posting in Infineon community.
1. I think QUC off in the first statement is typo because you cannot initiate a "Go to Sleep" command with QUC in the off state and neither QUC is configurable in the Normal state
2.Is the core voltage (VDD) supplied by EVRC of Aurix or with external post regulators? If VDD is supplied with EVRC, may i know if VDD is connected to VCI pin of PMIC?
I do suspect an Undervoltage event on VDD has caused PMIC to move from sleep state to INIT state where all regulators are in default state, that is ON.
Also, if possible, please do share the SPI log and VDD waveform.
Thanks
Anil
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Thanks for your advice.
I measured VDD.
As soon as MPC entered Standby, VDD dropped and QVR turned ON.
I guess it takes too long for the MPU to go to standby after the PMIC goes to sleep.
Is my guess correct?
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Hello,
Is the core voltage (VDD) supplied by EVRC of Aurix or with external post regulators? If VDD is supplied with EVRC, may I know if VDD is connected to VCI pin of PMIC?
Thanks
Anil
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Hello.
VDD is not connected to VCI pin of PMIC.
And the core voltage (VDD) is not supplied with external post regulators.
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Hello,
Thanks for the information.
Since VCI is not connected, UV of VDD is monitored by Aurix Internal voltage monitoring circuit and reported to TLF via ERR signal which puts TLF to INIT state.
The standby mode is the lowest mode in terms of power consumption, and it requires a specific transition procedure before the actual power mode switch takes place in order to limit the load variation at the supply rails. These procedures correspond to system functions that remain available in each of these modes and typical configuration settings of those functions. In addition, these steps also include the gradual shut-down flow of modules for the reduction of current spikes and spurious emissions which could be the cause of UV on VDD.
Please refer to the section 11.2.3.4.8 "Entering Standby Mode (only VEVRSB domain supplied)" from UM of Aurix to follow the right sequence. Link below
Thanks
Anil
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I appreciate you.
Thanks.