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xiaoxuan
Level 3
Level 3
50 sign-ins 25 replies posted 25 sign-ins

hello

I want to change the state to NORMAL-state, but I don't understand what the second condition means.

What do I have to do to satisfy the second condition?

xiaoxuan_0-1678156615931.png

 

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1 Solution
Polimera
Moderator
Moderator
Moderator
25 solutions authored 100 sign-ins 50 replies posted

Hi Xiaoxuan,

Thanks for the query. 

You have to make sure that the error signal is toggling  with a Valid high, low signals  with a valid ERR input signal frequency  . For that you need to monitor minimum three cycles.  The ERR signal toggles with changing high and low times (duty cycle can vary as well), but tlow and thigh are in the valid range between tDET,HF and tDET,LF. If the recommended conditions didnt meet , then the safe state signals will be pulled down.

 

Regards,

Kranthi

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10 Replies
Polimera
Moderator
Moderator
Moderator
25 solutions authored 100 sign-ins 50 replies posted

Hi Xiaoxuan,

Thanks for the query. 

You have to make sure that the error signal is toggling  with a Valid high, low signals  with a valid ERR input signal frequency  . For that you need to monitor minimum three cycles.  The ERR signal toggles with changing high and low times (duty cycle can vary as well), but tlow and thigh are in the valid range between tDET,HF and tDET,LF. If the recommended conditions didnt meet , then the safe state signals will be pulled down.

 

Regards,

Kranthi

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hello

Can you be more specific?

Do I only need to set the high and low of the ERR pin?

Do I need to configure some registers?

xiaoxuan_0-1678166036732.png

 

 

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Polimera
Moderator
Moderator
Moderator
25 solutions authored 100 sign-ins 50 replies posted

Hello,

You do not need to provide externally. Input for error signal from microprocessor safety managing unit (SMU, internal failure detection of the microprocessor). Connect the “error signal output” of the microprocessor to this pin. The error monitoring function requires a toggling signal at pin ERR with a determined timing in case of fault-free operation of the microcontroller by its SMU. This toggling signal is considered a “being alive” indication. An error should be indicated by a constant low signal. A constant high signal will also be regarded as a failure indication, probably caused by a short circuit. The result is given to the safe state control.

You need to check the INITERR register bit 5 to know any fault occurs because of this ERR signal. The Error monitoring may be configured and switched ON or OFF by SPI.

Regards,

Kranthi

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Thank you very much,

I have another question

I use SPI to feed the dog

OW is set to 50ms

The CW is set to 350ms

I read the INITERR register bit 3 with a value of 1

Here is my program. Can you help me see what the problem is?

static uint32 WDIC =0;

WDIC ++ ;   //WDIC is added by 1 millisecond at a time

uint16 WWDSCMD1[1] = {0xAE02}; //1 01 0111 0000 0001 0
uint16 WWDSCMD0[1] = {0xAE01};// 1 01 0111 0000 0000 1
uint16 rx[1];
if ((WDIC > 0)&&(WDIC < 20))
{
ec_Port_Write(22, 2, 0);
ec_Qspi4_MasterWriteRead(WWDSCMD0,rx,1);
ec_Port_Write(22, 2, 1);
}
else if ((WDIC >= 20)&&(WDIC < 375))
{
ec_Port_Write(22, 2, 0);
ec_Qspi4_MasterWriteRead(WWDSCMD1,rx,1);
ec_Port_Write(22, 2, 1);
}
else if (WDIC >= 375)
{
WDIC = 0;
}

 

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Polimera
Moderator
Moderator
Moderator
25 solutions authored 100 sign-ins 50 replies posted

Hi Xiaoxuan,

Bit 3 of INITERR is WWDF i.e., window watchdog error counter overflow failure flag.

The watchdog output indicates a “Valid” or “Invalid” WWD triggering
to the WWD failure counter. If there is a Invalid WWD triggering, then there will be increase in the window watchdog failure counter by two.  If there is a valid triggering then the window watchdog failure counter will be decremented by one. in case if more invalid triggers are there , then the counter will overflow and WWDF will occur. For valid and invalid triggers , please go through the Window watchdog section (section 15) in datasheet.

Regards,

Kranthi

 

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hello

I tried to initialize TLF35584 without enabling watchdog and ERR monitoring,

But my writes to the SYSPCFG1 and WDCFG0 registers did not work

I made sure that the Unlock operation on the PROTCFG register was done

I want to know why

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Polimera
Moderator
Moderator
Moderator
25 solutions authored 100 sign-ins 50 replies posted

Hi Xiaoxuan,

Can you cross-check whether your spi communication is proper or not? Could you please share your complete project file, so that we can review it.  If you don't want to share it in the public domain, you can send it to my official mail id.

Regards,

Kranthi

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hello,

You can see my post for the TLF35584 initializer and SPI waveform

TLF35584 Write to the protected register - Infineon Developer Community

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Polimera
Moderator
Moderator
Moderator
25 solutions authored 100 sign-ins 50 replies posted

hello,

I have seen that query and i replied for that.  Please check. 

 

 

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Polimera
Moderator
Moderator
Moderator
25 solutions authored 100 sign-ins 50 replies posted

Hi Xiaoxuan,

Can I close the ticket?

Kranthi

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