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jaywantmahajan
Level 2
Level 2
First like received 10 replies posted First solution authored

We are trying to run TLF35585 in standalone (without microcontroller) by pulling MPS pin high (5V). 

We have connected ENA and WAK directly to input supply.
And connected MPS signal to watchdog disable signal (5V)
At QST (standby) output should get 5V continuous.
BUT - we are only getting pulses like below (1mS width, 20mS interval) - similar waveforms are seen in all outputs.

Can you please suggest what is wrong here?

 

jaywantmahajan_2-1686976859562.png

 

jaywantmahajan_0-1686976790252.png

 

 

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1 Solution
Albab_A
Moderator
Moderator
Moderator
5 likes given 50 solutions authored 100 replies posted

Hello,

These points should be checked, from PMIC perspective:

  • VST
    • reverse protection diode missing
    • 100nF connected to GND  close to device
  • VS1 --> reverse protection diode
  • PG1 --> connect 100nF to FB1/2 --> on the schematic it is connected to another pin, please check this
  • FRE
    • low frequency (400kHz): connected to  GND --> in the schematic, connected to GND, so LF seems to be used - OK (but see SW below)
    • high frequency (2,2MHz): leave open
  • SW
    • low frequency (400kHz): Inductor of 22µH and capacitor of 68-100µF
    • high frequency (2,2MHz): Inductor of 4,7µH and capacitor of 10-47µF 
    • in the schematic, the inductor value is 47uH and the equivalent cap 68u+100n.
  • FB1
    • connect 100nF to PG1/2
    • connect the capacitor of the step down pre regulator output filter
  • VCI --> to obtain a proper monitoring the output voltage of the post regulator has to be connected to the voltage monitoring input at pin VCI via a resistor divider. The resistor divider should be dimensioned to adjust the post regulator output voltage
  • QST --> 2x 680nF-1µF recommended

After these modifications (especially important the ones on SW & FB) are done, we can check again the behavior of QUC. It is important to follow our recommendations for SW, FB, QUC pins, they are part of regulating loop and influence the behaviour of the post regulators.

 

Best Regards,

Albab

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5 Replies
Albab_A
Moderator
Moderator
Moderator
5 likes given 50 solutions authored 100 replies posted

Hello,

These points should be checked, from PMIC perspective:

  • VST
    • reverse protection diode missing
    • 100nF connected to GND  close to device
  • VS1 --> reverse protection diode
  • PG1 --> connect 100nF to FB1/2 --> on the schematic it is connected to another pin, please check this
  • FRE
    • low frequency (400kHz): connected to  GND --> in the schematic, connected to GND, so LF seems to be used - OK (but see SW below)
    • high frequency (2,2MHz): leave open
  • SW
    • low frequency (400kHz): Inductor of 22µH and capacitor of 68-100µF
    • high frequency (2,2MHz): Inductor of 4,7µH and capacitor of 10-47µF 
    • in the schematic, the inductor value is 47uH and the equivalent cap 68u+100n.
  • FB1
    • connect 100nF to PG1/2
    • connect the capacitor of the step down pre regulator output filter
  • VCI --> to obtain a proper monitoring the output voltage of the post regulator has to be connected to the voltage monitoring input at pin VCI via a resistor divider. The resistor divider should be dimensioned to adjust the post regulator output voltage
  • QST --> 2x 680nF-1µF recommended

After these modifications (especially important the ones on SW & FB) are done, we can check again the behavior of QUC. It is important to follow our recommendations for SW, FB, QUC pins, they are part of regulating loop and influence the behaviour of the post regulators.

 

Best Regards,

Albab

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jaywantmahajan
Level 2
Level 2
First like received 10 replies posted First solution authored
  • VST
    • reverse protection diode missing = There is separate reverse protection circuit for this at the input.
    • 100nF connected to GND  close to device = Yes we have in schematics (C22)
  • VS1 --> reverse protection diode = There is separate reverse protection circuit for this at the input.
  • PG1 --> connect 100nF to FB1/2 --> on the schematic it is connected to another pin, please check this = Yes we have in schematics (C836) 
  • FRE
    • low frequency (400kHz): connected to  GND --> in the schematic, connected to GND, so LF seems to be used - OK (but see SW below) = No we kept it open. Please check pin 24 in schematics.
    • high frequency (2,2MHz): leave open = Yes we kept it open.
  • SW
    • low frequency (400kHz): Inductor of 22µH and capacitor of 68-100µF 
    • high frequency (2,2MHz): Inductor of 4,7µH and capacitor of 10-47µF  
    • in the schematic, the inductor value is 47uH and the equivalent cap 68u+100n. = No. L4 is 4.7uH. and Capacitor C30+C31 = 32uF
  • FB1
    • connect 100nF to PG1/2 = Yes connected C836
    • connect the capacitor of the step down pre regulator output filter = Yes connected.
  • VCI --> to obtain a proper monitoring the output voltage of the post regulator has to be connected to the voltage monitoring input at pin VCI via a resistor divider. The resistor divider should be dimensioned to adjust the post regulator output voltage = We are not using external post regulator for core supply. It is directly controlled by Aurix.
  • QST --> 2x 680nF-1µF recommended = We have additional filter capacitors of 22u + 1u + 0.1u + 0.1u on this line.

Can you please suggest any more possibilities?

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Hello,

I have some follow-up questions for you in order to know the query in a best possible manner-

  • Can you send waveform for Vprereg, Vquc, MPS and ROT.
  • Is your WAK/ENA signal within the threshold limits as mentioned in the datasheet
  • Can you show Vs waveform whether there exists a problem of slow ramp down behaviour. As Vs has to maintain a good slew rate in order for a device not to reach failsafe

Moreover, may I know whether you are using MPS enabled under the development mode? As this is for debuggig purpose of microcontroller and to check the latent faults during the drive cycle.

 

Best Regards,

Albab

 

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jaywantmahajan
Level 2
Level 2
First like received 10 replies posted First solution authored

Ok. I will take waveforms and send you. We have not yet soldered microcontroller. Before soldering microcontroller on board we want to test if PMIC output is correct and all regulators working fine. 
That is why we connected 5V to MPS signal to ignore microcontroller presense.

 

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jaywantmahajan
Level 2
Level 2
First like received 10 replies posted First solution authored

The problem is resolved. The capacitors in the QDT 5V filter section were not assembled. Once we assembled those, the output is coming now. 

Thank  you.

0 Likes