TLE92464ED design support

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zhao1990
Level 1
Level 1
First like received 5 questions asked First reply posted

Hi, we are using TLE92464ED in our controller. We have used 2 chips in both separate channel mode (4 input DRVx and 4 Load ) and  parallel channel mode. We use PWM signals as DRVx input (Direct Drive Mode via DRVx-pin). The chip we used in separate channel mode(4 input DRVx and 4 Load )  is normal, and we can control the output current using different duty cycles. But the chip  we used in parallel mode is abnormal, we could not control the output using different PWM duty cycles.

Below is these two chip's design. Can we use the DRVx input PWM signal to control this chip?  We are sure that  we enable the CH_PAR_0_3 and CH_PAR_1_2 bit to 1.

zhao1990_0-1700814230429.png

zhao1990_1-1700814299913.png

 

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1 Solution
Mathi_E
Moderator
Moderator
Moderator
10 solutions authored 25 sign-ins First like received

The parallel mode configuration bits CH_PAR_x can only be set in Config mode and Channel 0 and 1 are the master channels and channel 2 and 3 are the slave channels. Only the master channels can be configured via SPI. More details please refer to section 4.5.2 in datasheet. EN_CH bit need to be set. 

For Parallel mode connect DVR0 and DRV3 on the PCB. 

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3 Replies
Mathi_E
Moderator
Moderator
Moderator
10 solutions authored 25 sign-ins First like received

Hi,

The parallel mode configuration bits CH_PAR_x can only be set in Config mode and Channel 0 and 1 are the master channels and channel 2 and 3 are the slave channels. Only the master channels can be configured via SPI. More details please refer to section 4.5.2 in datasheet. 

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Hi mathi,

we have resolved this issue. The problem was that we mistakenly thought that enabling parallel channel mode only required setting the parallel channel mode bit, without enabling the EN_CH bit. Enabling it resolved the issue. Now we have another question. For the parallel mode, we can only find the following reference picture in the manual. We are unsure if our hardware design for the parallel mode circuit needs adjustment, such as connecting LOAD0 and LOAD3 in parallel on the PCB. When using the direct drive mode in parallel, do we need to connect DVR0 and DRV3 on the PCB? Thank you for your response.

zhao1990_0-1701133228265.png

 

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Mathi_E
Moderator
Moderator
Moderator
10 solutions authored 25 sign-ins First like received

The parallel mode configuration bits CH_PAR_x can only be set in Config mode and Channel 0 and 1 are the master channels and channel 2 and 3 are the slave channels. Only the master channels can be configured via SPI. More details please refer to section 4.5.2 in datasheet. EN_CH bit need to be set. 

For Parallel mode connect DVR0 and DRV3 on the PCB. 

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