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User21730
Level 1
Level 1
5 replies posted 5 questions asked First reply posted

Hello All,

Quick question is it possible to perform an SPI communication without using DMA.

I am using a code without DMA usage: Code from INFINEON

After debugging: directly after executing this line 

IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
{
qspi->GLOBALCON.B.EN = 1;
}

I'm getting here:  __asm__ volatile ("debug" : : : "memory");

The status of SRC_QSPI2ERR is: 

Value:

0x09170434

Values:

SRPN 0x34 

SRE Service request is enabled

TOS CPU0 service is initiated

ECC 0x17

SRR A service request is pending

CLRR Register is write only

SETR Register is write only

IOV Interrupt Overflow Detected

IOVCLR Register is write only

SWS No interrupt was initiated via SETR

SWSCLR Register is write only

 

User21730_0-1645526886605.png

Do you have any suggestions why the the QSPI module cannot be initialized properly.

Many thanks guys

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1 Solution
cwunder
Employee
Employee
100 solutions authored 5 likes given 50 likes received

You do not have to use the DMA for QSPI communication. You are free to use software polling, interrupts or DMA. Interrupts and DMA will use the IR. The SRC would have a different TOS (either DMA or CPU). The SPRN is the vector table entry instead of the DMA channel number. 

The screen shot from the iSystem debugger shows that an interrupt is pending and would be cleared once the cpu vectors to the entry (as the TOS=CPU0). This can be blocked when interrupts are not globally enabled or the CCPN is equal to or greater than 0x34 (the SPRN value you programmed into the SRC register).

Most likely you are in a trap routine which will globally disable the interrupts So that is why you wouldn't vector to the QSPI error interrupt routine. You need to figure out why you are getting a trap when enabling the QSPI. 

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1 Reply
cwunder
Employee
Employee
100 solutions authored 5 likes given 50 likes received

You do not have to use the DMA for QSPI communication. You are free to use software polling, interrupts or DMA. Interrupts and DMA will use the IR. The SRC would have a different TOS (either DMA or CPU). The SPRN is the vector table entry instead of the DMA channel number. 

The screen shot from the iSystem debugger shows that an interrupt is pending and would be cleared once the cpu vectors to the entry (as the TOS=CPU0). This can be blocked when interrupts are not globally enabled or the CCPN is equal to or greater than 0x34 (the SPRN value you programmed into the SRC register).

Most likely you are in a trap routine which will globally disable the interrupts So that is why you wouldn't vector to the QSPI error interrupt routine. You need to figure out why you are getting a trap when enabling the QSPI. 

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