Power ON reset (POR) for AURIX

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abhishek-2138
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We are using PMIC TLF35584 for AURIX TC364.

For POR I have added external RC circuit common with PMIC.

Is it recommended to have external POR by using RC components.

For PMIC the low level reset is of 0.7V & reset cycle time = 10us (typ.) & reaction time  = 20us (max)

What's difference between reset cycle time & reaction time? Which time should be considered for POR ?

abhishek2138_0-1677469508837.png

Do we have to limit the current as in above snap for PMIC?

What is the low level reset threshold voltage level for AURIX, reset release voltage level & duration?

 

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AnilKumar
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AnilKumar
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First question asked 50 solutions authored 10 likes received

Hello,

RC circuit is not mandatory for POR. Voltage sequencing will automatically be handled by PMIC. But a pull up of resistor >1.5k and series resistor of min 50-100Ohm is required to limit the current when exposed to high voltage.

Reset reaction time: Minimum time to detect a UV,OV fault and issue a reset signal. i.e. any UV,OV fault less than tRR will not be detected as fault and reset will not be issued.
(Refer "Figure 20 Timing diagram hardware reset signal ROT for output voltages")

Reset Cycle time: This is to define reset delay time (tRD), which is time to release reset signal after all voltage rails are above reset threshold.

For POR, predominantly tRD is more relevant as it defines the total delay to release reset after all rails are active.

Thanks 

Anil

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abhishek-2138
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Hello,

 
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abhishek-2138
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Hello,

b3d85d56-b27e-46a2-bcb9-1ba595a382b1.jpg

As you said, R556 > 1.5kOhm,  R298 = 50 to 100 ohm & C409 removed.

If yes, then R556 & R298 are in series. Can you pls comment on this.

Regards,

Abhishek D.

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AnilKumar
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Hello,

Please refer to the diagram below, i.e. series resistor towards PMIC side

AnilKumar_0-1677729394071.png

Thanks 

Anil

abhishek-2138
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Thanks Anil,

Any decoupling cap required here connected to voltage divider junction of MCU? 

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AnilKumar
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Not mandatory