Hello @User19535 ,
Below are few observations from the schematic shared.
1. Vsns potential should be maintained between 0.45V to 0.605V. 0.605V is the internal OVP threshold in case of analog mode. Kindly modify the values of R426 & R425 to meet this requirement ( Refer page 35)
2. Remote voltage sensing: The input range for the differential amplifier is limited to 1.5V below the VCC rail. Therefore, for applications in which the output voltage is more than 3V, it is recommended to use local sensing, or if remote sensing is a must, then the output voltage between the RS+ and RS-pins must be divided down to less than 3V using a resistive voltage divider. An example circuit for digital mode, Vout>2.55V is shown below. Similar approach can be followed for analog mode as well.
Please note, however, that this modifies the open loop transfer function and requires a change in the compensation network to optimally stabilize the loop.
3. For normal operation, Vp is left floating and a 100 kOhm resistor is connected from Track_En to P1V8. Therefore, in normal operating condition, after Enable goes high, DAC2 ramps up the output voltage until Vfb (voltage
of feedback/Fb pin) reaches about 0.5V. (Refer page 33)
Hence Voltage at FB pin corresponding to actual output voltage should be 0.5V .
This FB pin can be either connected to Remote sense amplifier output or can directly divided down to 0.5 from the converter output. In former case, care should be taken in designing the divider circuit at the input of the remote sense amplifier and the compensation loop.
4. One optional improvement point is that the potential at EN pin can be increased to >4V for normal operation, to utilize the LIGHT LOAD EFFICIENCY ENHANCEMENT(AOT) mode. (Refer page 31)
All references are taken from IC datasheet.
Additionally you can also simulate your design using Infineon designer tool.
https://design.infineon.com/tinademo/tina.php?path=EXAMPLESROOT%7CINFINEON%7C&file=start.tsc
Some reference designs of IR38062 in digital mode can be found in below link, which can be refered for more information.
These changes should help in getting the desired output. If you face further issues, kindly let us know.
Regards
Meghana R
Hello @User19535 ,
There are two points which needs to be looked into.
1. The component values : Addition to the resistors mentioned in your previous reply, please also pay attention to the values of the compensation networks connected on RSO and FB pins.
2. Overvoltage Limit : The default OV threshold is set at 0.605V which corresponds 1.210V with below configuration.
VSNS: R14=R15=499 ohm
This internal threshold needs to be modified using the the PMBus command VIN_OV_FAULT_LIMIT.
Also note, for an OVP threshold programmed to be more than 655 mV greater than the output voltage,
the effective OV threshold ceases to be an absolute value and instead tracks the output voltage with a
655 mV offset.
Please refer to below user guide to the set the value for VIN_OV_FAULT_LIMIT(55h).
Hope this helps.
Regards
Meghana R
Hello @User19535 ,
The attached are the snapshots of the circuit and waveforms derived from the simulation model with the same configuration as you have mentioned. The output reaches 1.8V as expected with the divider values as mentioned in your previous message.
The link for the simulation model is also provided below.
https://design.infineon.com/tinaui/designer.php?c=6220ab70bfc78
With the default configuration of IR38062, the resistor values mentioned by you, should provide you the expected results. Can you please try to redo the experiment and record the voltage waveforms at VOUT, RSO, FB & SW. Please share us these measurements for further analysis if you continue to face the issue.
Regards
Meghana R
