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Power Management ICs Forum Discussions

bargo
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Hello folks.

 

I hope you are doing well.

I have a a board which run two 1+1 phases using the IR35217 which i'm trying to debug, as far as I can see the device address has changed to 0x0a according to the test mode settings, I would like to know which registers are writable in the test mode, I can't find any documentation on that. dumping the register table in test mode gives me this:

 

Spoiler
    0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f:
00: 80 80 80 80 80 80 80 00 9f 9f 9f 9f 9f 9f 80 80
10: 20 82 82 82 82 82 00 04 00 00 00 00 00 ff ff 00
20: 00 66 00 66 08 22 10 00 64 14 00 00 00 00 00 00
30: 00 00 00 00 00 2e ee 44 a4 ff 00 11 11 10 10 54
40: 11 60 ce 14 11 20 ce 14 90 2a 6a 14 14 04 70 00
50: e0 aa a8 90 a8 90 00 00 00 00 00 04 d4 14 00 00
60: 00 60 a0 ff ff 00 88 88 88 44 00 82 82 88 00 44
70: 83 70 71 00 80 60 00 00 00 00 00 88 00 00 00 00
80: 00 47 00 52 49 00 00 00 01 14 00 00 00 00 00 00
90: 00 00 40 60 48 0a 00 00 d4 fc 00 00 00 00 ff fb
A0: 24 00 a3 10 06 16 00 00 00 00 00 00 00 00 00 00
B0: 00 00 00 b0 68 00 00 00 00 11 38 00 00 ff ff 00
C0: 00 00 00 05 ff 00 01 16 00 00 00 00 00 03 00 40
D0: 0c ad 00 00 00 3f 00 c0 e4 0f 00 00 00 02 00 00
E0: 00 00 00 00 00 00 00 80 07 01 00 00 00 00 00 00
F0: 00 00 00 00 00 00 00 00 00 00 04 00 49 52 00 00

All my best,

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Sodum
Moderator
Moderator
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10 likes received 5 likes given 25 solutions authored

Hello @bargo ,

Please let me know if my understanding is correct, "once you complete step 4, i2c address is been changed to a different value compared to the test mode value". Also let me know are you able to execute the further steps stated in above chart.

Table 2, 3 & 4 explains about the different section of registers & their addresses. 

Please find the attached programming guide, this covers the detailed programming procedure.

 

Regards,

Premsagar S 

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Sodum
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Moderator
Moderator
10 likes received 5 likes given 25 solutions authored

Hello @bargo ,

Thank you for posting your query in Infineon Community.

The I2C device address will be changed to "0x0A" when the chip is in Test Mode.

The image you have shared is the register map of the chip.

Please find the steps in the image below to write the registers in the test mode,

Sodum_0-1671195778264.pngSodum_1-1671195805049.png

 

Regards,

Premsagar S

 

bargo
Level 1
Level 1
5 sign-ins First like received First like given

Thanks Sodum, much appreciated. I actually have a bit more understanding now.

I still don't understand the behavior after setting 0x3e to register 0xce I get the original i2c/pmbus addresses with the correct offset according to the resistor values, but is this what supposed to happen? so reloading the otp bring back the latest otp back to these addresses, of course the original test mode address is gone after that. 

I assume from table 2,3,4 the address would be the restored i2c address , I can't still find what is table 5 and 6, I mean for step 9 and  step 11, is it 0x40 for step 9 and 0x58 for step 11 to be written on 0xCE I mean? 

Thanks again anyway.

 

All my best,

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Sodum
Moderator
Moderator
Moderator
10 likes received 5 likes given 25 solutions authored

Hello @bargo ,

Please let me know if my understanding is correct, "once you complete step 4, i2c address is been changed to a different value compared to the test mode value". Also let me know are you able to execute the further steps stated in above chart.

Table 2, 3 & 4 explains about the different section of registers & their addresses. 

Please find the attached programming guide, this covers the detailed programming procedure.

 

Regards,

Premsagar S 

bargo
Level 1
Level 1
5 sign-ins First like received First like given

This explains it very well Sodum. Much appreciated.

All my best,