ICE3PCS01G current distortion at higher power levels

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KuglicsL
Level 1
Level 1
First solution authored First reply posted 5 sign-ins

Hello!

We've been developing an AC/DC boost PFC based on the ICE3PCS01G.

The specs are as:

  • Input: 24VAC
  • Active diode bridge based on Analog Devices LT4320 IC
  • Output: 34VDC
  • Output current: 12A
  • Frequency: 100kHz
  • Boost inductor: 10uH, IHDF1300AEEH100K10
  • Boost FET: FDMS86500L
  • FET gate drive resistor: 5 ohms
  • Boost diode: DSB60C60HB
  • Boost diode is isolated from heatsink, heatsink is tied to Pgnd
  • Output capacitance: 4*4700uF 50V electrolytics

During testing, we ran into a problem, where at about 6A output current at 34V DC, the input current deviates from the ideal sine wave.

We've narrowed down the problem, and it seems like this distortion only happens when the duty cycle of the PFC IC changes abruptly between periods.

What we've confirmed so far:

  • there is no gate-source ringing
  • increasing gate resistor increases the available current without distortion (sadly FET starts to overheat at ~15 ohms)
  • increasing the inductor to 100uH has little effect on distortion
  • increasing the output bulk capacitance has no effect on distortion
  • changing the ideal diode bridge to a standard diode bridge has no effect on distortion
  • changing switching frequency has a small effect on distortion (tried between 40-200kHz)
  • decreasing shunt resistor from 4mR to 2mR has no effect on distortion -> seems like this is not an overcurrent problem
  • PFC logic power supply is stable and noise-free (20V)

Putting low-impedance film capacitance (~1-3uF) very close to the boost diode between Vout and Pgnd helps increasing the current from 6 up to 8 amps, but adding more caps yields diminishing returns.

Low impedance film cap from Vout to input AC1 and AC2 seems to reduce noise, but this also yields diminishing returns.

The only thing that significantly increased the available current was increasing the gate resistor to about 30Ohms. This lets us draw 12A from the PFC without any problems, other than the FET staying for too long in the linear region and burning up. 

I've attached some pictures depicting the normal working state and the distorted current shapes, together with the abrupt change in PWM output. One thing to note: as we increase the output current, the distorted part moves from the top of the sine wave to the side of the sine wave (see distortion at 6A vs 8A).

Working normal at 5A of output current:

5A_normal.jpg

Distortion starts at about 5,8-5,9 amps output:

6A_starting_to_distort.jpg

Distorted sine wave at 8A output:

8A.jpg

The current waveform (green) and the gate drive (yellow) when distortion happens (7A):

gatedrive.jpg

Close-up of the PWM suddenly changing (zoomed in on center of previous image):

gatedrive_closeup.jpg

Schematics of PFC stage are attached!

Any and all suggestions are appreciated!

Thank you!

Lajos Kuglics

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1 Solution
KuglicsL
Level 1
Level 1
First solution authored First reply posted 5 sign-ins

Hello!

I've managed to find the problem. It was inherently a layout problem causing a noise problem, which somehow ended up influencing the control loop of the PFC.

Placing a 1uF low-esr foil capacitor right between the PGND side of the current sense resistors, and the output of the boost diode eliminated all the problems I had with the design. When I was doing it previously, I used the dedicated place which had more loop area in the FET - diode - output capacitor loop.

pfc_solution.jpg

Here is a part of the board: AC comes in at the bottom of the picture, going through the active AC/DC converter. After the inductor comes the boost FET (Q5), and then back through the sense resistors (R7, R8).

Initially, I put a foil cap in the gap of the heatsink of the boost diode, which is about 3cm away from the sense resistor. This was attempt #1. After putting a 1uF foil cap right between the boost diode output and the sense resistor PGND, the problem went away fully (attempt #2 with the blue cap).

I hope this information can help others who run into a similar layout problem in the future!

Thank you anyways for the suggestion, and regarding that: it seems like the PFC IC can drive the FET without any problems, the gate resistor increase resulting in decreasing distortion was a noise problem, caused by a layout issue. I guess I will have to be even more careful in the future with my layout!

Best regards,

KuglicsL

View solution in original post

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2 Replies
Guruprasad_A
Moderator
Moderator
Moderator
25 likes received 250 sign-ins 50 solutions authored

Hi @KuglicsL ,

As you mentioned increase in the Gate resistor is helped. Did you test with an external gate driver?

 

KuglicsL
Level 1
Level 1
First solution authored First reply posted 5 sign-ins

Hello!

I've managed to find the problem. It was inherently a layout problem causing a noise problem, which somehow ended up influencing the control loop of the PFC.

Placing a 1uF low-esr foil capacitor right between the PGND side of the current sense resistors, and the output of the boost diode eliminated all the problems I had with the design. When I was doing it previously, I used the dedicated place which had more loop area in the FET - diode - output capacitor loop.

pfc_solution.jpg

Here is a part of the board: AC comes in at the bottom of the picture, going through the active AC/DC converter. After the inductor comes the boost FET (Q5), and then back through the sense resistors (R7, R8).

Initially, I put a foil cap in the gap of the heatsink of the boost diode, which is about 3cm away from the sense resistor. This was attempt #1. After putting a 1uF foil cap right between the boost diode output and the sense resistor PGND, the problem went away fully (attempt #2 with the blue cap).

I hope this information can help others who run into a similar layout problem in the future!

Thank you anyways for the suggestion, and regarding that: it seems like the PFC IC can drive the FET without any problems, the gate resistor increase resulting in decreasing distortion was a noise problem, caused by a layout issue. I guess I will have to be even more careful in the future with my layout!

Best regards,

KuglicsL

0 Likes