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User21730
Level 1
Level 1
5 replies posted 5 questions asked First reply posted
Hello All,

My intention is to establish the SPI communication between QSPI2 and the TLF then send 8001 as frame to read a register value but the SPI Communication is not succesful:
My question is how I can make sure that the communication has been established in which register?
I don't have a deep knowledge in all parameters that should be set, but I am doubting that frequency values are not correct.
(Port pin config is checked it is well configured )
Many thanks

My code:
#define SPI_BUFFER_SIZE 2
void masterTxISR(void)
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrTransmit(&g_QspiCpu.drivers.spiMaster);
}
void masterRxISR(void)
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrReceive(&g_QspiCpu.drivers.spiMaster);
}
void masterErISR(void)
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrError(&g_QspiCpu.drivers.spiMaster);
}
void initQSPI(void){
/* disable interrupts */
boolean interruptState = IfxCpu_disableInterrupts();
IfxQspi_Masterinit();
/* enable interrupts again */
IfxCpu_restoreInterrupts(interruptState);
}

void IfxQspi_Masterinit(void)
{
uint32 i;
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
/* create module config */
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI2);


spiMasterConfig.base.mode = SpiIf_Mode_master;

const IfxQspi_SpiMaster_Pins pins = {&IfxQspi2_SCLK_P13_0_OUT, IfxPort_OutputMode_pushPull,/* SCLK */ //0x10U << 3
&IfxQspi2_MTSR_P13_3_OUT, IfxPort_OutputMode_pushPull, /* MTSR */ //
&IfxQspi2_MRSTE_P15_2_IN, IfxPort_InputMode_noPullDevice, /* MRST */
IfxPort_PadDriver_cmosAutomotiveSpeed3 /* pad driver mode */
};
spiMasterConfig.pins = &pins; /* Assign the Master's port pins */


/* set the maximum baudrate */
//spiMasterConfig.base.maximumBaudrate = 10000000;//same in the DS

/* ISR priorities and interrupt target */
spiMasterConfig.base.txPriority = ISR_PRIORITY_QSPI2_TX;
spiMasterConfig.base.rxPriority = ISR_PRIORITY_QSPI2_RX;
spiMasterConfig.base.erPriority = ISR_PRIORITY_QSPI2_ER;
spiMasterConfig.base.isrProvider = (IfxSrc_Tos)IfxCpu_getCoreIndex();

/* initialize module */
IfxQspi_SpiMaster_initModule(&g_QspiCpu.drivers.spiMaster, &spiMasterConfig);

/* create channel config */
IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig,&g_QspiCpu.drivers.spiMaster);

/* set the baudrate for this channel */
spiMasterChannelConfig.base.baudrate = 5000000;

/* Select the port pin for the Chip Select signal */
const IfxQspi_SpiMaster_Output slsOutput = {&IfxQspi2_SLSO2_P14_6_OUT,/* QSPI1 Master selects the QSPI3 Slave */
IfxPort_OutputMode_none, /* Slave Select port pin (CS) */
IfxPort_PadDriver_cmosAutomotiveSpeed1};/* Pad driver mode */

spiMasterChannelConfig.sls.output = slsOutput;

/* Initialize the QSPI Master channel */
IfxQspi_SpiMaster_initChannel(&g_QspiCpu.drivers.spiMasterChannel,&spiMasterChannelConfig);

//QSPI Master SW buffer initialization
g_QspiCpu.qspiBuffer.spi2TxBuffer[0] = 0x00;
g_QspiCpu.qspiBuffer.spi2TxBuffer[1] = 0x00;
g_QspiCpu.qspiBuffer.spi2RxBuffer[0] = 0x00;
g_QspiCpu.qspiBuffer.spi2RxBuffer[1] = 0x00;

/**************************************************************************************************************************************************************/


//TlfWd_InitSPI_IOs
// P14_OUT.B.P6 = 1U; /*Set chip select [TLF_CS_SPI] to high*/
// P14_IOCR4.B.PC6= 0x0013U; /*P14.6: output, push_pull, alternate out: 3 means QSPI2_SLSO2 : TLF_CS_SPI*/
// P13_IOCR0.B.PC3 = 0x0013U; /*P13.3: output, push_pull, alternate out: 3 means QSPI2_MTSR : TLF_MOSI_SPI*/
// P15_IOCR0.B.PC2 = 0x0000U; /*P15.2: input, no pull device connected, used functionality: QSPI2_MRSTE : TLF_MISO_SPI*/
// P13_IOCR0.B.PC0 = 0x0013U; /*P13.0: output, push_pull, alternate out: 3 means QSPI2_SCLK : TLF_CLK_SPI */
//vinay



//Marcus port config
P13_IOCR0.B.PC3 = 0x13U; /*P13.3: O3, alternate output function 3, i.e. QSPI2_MTSR : TLF_MOSI_SPI*/
P15_IOCR0.B.PC2 = 0x00U; /*P15.2: I, input with no input pull device connected, used functionality: QSPI2_MRSTE : TLF_MISO_SPI*/
P13_IOCR0.B.PC0 = 0x13U; /*P13.0: O3, alternate output function 3, i.e. QSPI2_SCLK : TLF_CLK_SPI */

P14_IOCR4.B.PC6 = 0x13U; /*P14.6: O3, alternate output function 3, i.e. QSPI2_SLSO2 : TLF_CS_SPI*/
P14_OUT.B.P6 = 1U; /*Set chip select [TLF_CS_SPI] to high*/

/**************************************************************************************************************************************************************/
#endif

}

void IfxQspiCpu_run()
{


g_QspiCpu.qspiBuffer.spi2TxBuffer[0] = 0x80;
g_QspiCpu.qspiBuffer.spi2TxBuffer[1] = 0x01;
while(IfxQspi_SpiMaster_getStatus(&g_QspiCpu.drivers.spiMasterChannel) == SpiIf_Status_busy)
{ /* Wait until the previous communication has finished, if any */}
//IfxQspi_SpiMaster_writeTransmitFifo(&g_QspiCpu.drivers.spiMasterChannel,0xB00);
IfxQspi_SpiMaster_exchange(&g_QspiCpu.drivers.spiMasterChannel, &g_QspiCpu.qspiBuffer.spi2TxBuffer[0],
&g_QspiCpu.qspiBuffer.spi2RxBuffer[0], SPI_BUFFER_SIZE);//SPI_BUFFER_SIZE is 2

while(IfxQspi_SpiMaster_getStatus(&g_QspiCpu.drivers.spiMasterChannel) == SpiIf_Status_busy){};


}
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1 Solution
AnilKumar
Moderator
Moderator
Moderator
First question asked 50 solutions authored 10 likes received

Hello,

Thank you for posting your query in Infineon community.

1.Ensure the μC first configures the clock, using a frequency less than or equal to the maximum

frequency the TLF35584 supports, i.e. <10 MHz

AnilKumar_0-1647858791899.png

 

2.Enable the chip select for TLF35584.

3.For read operation, CMD bit should be set as 0 (refer page 162 in datasheet).

Also, referring from below address of PMIC,

AnilKumar_1-1647858791905.png

 

Value to be written in MOSI (for read) is 0000,

AnilKumar_2-1647858791907.png

If the communication is still not successful, please follow t trail, t lead and t interframe timings as well

AnilKumar_3-1647858992198.png

Reach out to us for further assistance, if any

 

View solution in original post

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1 Reply
AnilKumar
Moderator
Moderator
Moderator
First question asked 50 solutions authored 10 likes received

Hello,

Thank you for posting your query in Infineon community.

1.Ensure the μC first configures the clock, using a frequency less than or equal to the maximum

frequency the TLF35584 supports, i.e. <10 MHz

AnilKumar_0-1647858791899.png

 

2.Enable the chip select for TLF35584.

3.For read operation, CMD bit should be set as 0 (refer page 162 in datasheet).

Also, referring from below address of PMIC,

AnilKumar_1-1647858791905.png

 

Value to be written in MOSI (for read) is 0000,

AnilKumar_2-1647858791907.png

If the communication is still not successful, please follow t trail, t lead and t interframe timings as well

AnilKumar_3-1647858992198.png

Reach out to us for further assistance, if any

 

0 Likes