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Solved! Go to Solution.
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Have you seen Brad Buddings blog, I think he addresses a number of datapath
issues, like parallel access -
Regards, Dana.
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Welcome in the forum!
There are different ways to access an UDB-component
There are a parellel-in and -out bus for signals into the UDB which migt be connected to a control register
There are two FIFOs with the appropiate signals which you may read or write data from/to.using the CPU*
You may even use DMA (on a PSoC4-M) to get data in/out the FIFOs
You may write data directly into the D-registers and read from them
Keep in ming that an UDB contains some (not few!!) PLD logic that allows to create counters shifters digital comparators etc without using the ALU
There are some "Cheat Sheets" (type that into the keyword search on top of this page) helping you to create a working 24-bit wide component.
*It is not magic: If you know the name of an item, you can control it! Since the position of a component may vary from built to built there are some names generated in the component's .h-file to access the internal registers. A self-written component has to provide this .h-file as well and now it is your responsibility to create the appropiate #defines for accessing the internals. In the "Component Author Guide" chapter 6.4 are those secret names listed. Use those with wisdom and care
Bob
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Keep in mind that there is a rather powerfull hardware-optimizing step. All unused hardware will get optimized out. So a component which's outputs are dangeling and are not connected to a pin will vanish into thin air!
Bob
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Have you seen Brad Buddings blog, I think he addresses a number of datapath
issues, like parallel access -
Regards, Dana.
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When using ms ie as browser switch on "compatibility mode".
Bob
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...by the way: Has BlackTiger anything to do with PinkPanther?
Bob
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In the keyword search field on the forum page type in "brad budlong datapath",
quite a few hits.
Regards, Dana.
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danaaknight,
The Brad blog stuff (PSoCSensei) is the absolute best. After watching several times because the info is so dense, I am now dangerous because I believe I know what I'm doing.
THEN ---- a moment of reflection. Why was I using Verilog? I still needed to make stuff glitch-free, implement interrupts handle the FIFO and DMA.... In the 15 minutes it took me to have my morning coffee, I did it using the regular schematic. A 24-bit shifter, and counter and an edge detect --- and I was basically done and had all the features I would still have to implement in Verilog.
Now I just feel silly. It was just too ingrained in me -- can't use SPI Master, so I must use Verilog.
Also, I noticed that the entire library is there, loadable and modifiable, if needed. The PSoC Creator and Cypress has just overtaken Altera for the best development tools (Microchip, Atmel and Xilinx don't even deserved to be mentioned).
And best community forum support EVER.
Now, we just need a good hardware simulator, as I'm still stuck with Icarus Verilog.
Thanks again folks,
--Ken